drm/nouveau/fbcon: convert accel_init() to new push macros
[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / nv04_fbcon.c
index 01731db..a254e5f 100644 (file)
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-
+#define NVIF_DEBUG_PRINT_DISABLE
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
 #include "nouveau_fbcon.h"
 
+#include <nvif/push006c.h>
+
 int
 nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 {
@@ -137,6 +139,7 @@ nv04_fbcon_accel_init(struct fb_info *info)
        struct nouveau_drm *drm = nouveau_drm(dev);
        struct nouveau_channel *chan = drm->channel;
        struct nvif_device *device = &drm->client.device;
+       struct nvif_push *push = chan->chan.push;
        int surface_fmt, pattern_fmt, rect_fmt;
        int ret;
 
@@ -168,110 +171,90 @@ nv04_fbcon_accel_init(struct fb_info *info)
                return -EINVAL;
        }
 
-       ret = nvif_object_init(&chan->user, 0x0062,
+       ret = nvif_object_ctor(&chan->user, "fbconCtxSurf2d", 0x0062,
                               device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ?
                               0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d);
        if (ret)
                return ret;
 
-       ret = nvif_object_init(&chan->user, 0x0019, 0x0019, NULL, 0,
-                              &nfbdev->clip);
+       ret = nvif_object_ctor(&chan->user, "fbconCtxClip", 0x0019, 0x0019,
+                              NULL, 0, &nfbdev->clip);
        if (ret)
                return ret;
 
-       ret = nvif_object_init(&chan->user, 0x0043, 0x0043, NULL, 0,
-                              &nfbdev->rop);
+       ret = nvif_object_ctor(&chan->user, "fbconCtxRop", 0x0043, 0x0043,
+                              NULL, 0, &nfbdev->rop);
        if (ret)
                return ret;
 
-       ret = nvif_object_init(&chan->user, 0x0044, 0x0044, NULL, 0,
-                              &nfbdev->patt);
+       ret = nvif_object_ctor(&chan->user, "fbconCtxPatt", 0x0044, 0x0044,
+                              NULL, 0, &nfbdev->patt);
        if (ret)
                return ret;
 
-       ret = nvif_object_init(&chan->user, 0x004a, 0x004a, NULL, 0,
-                              &nfbdev->gdi);
+       ret = nvif_object_ctor(&chan->user, "fbconGdiRectText", 0x004a, 0x004a,
+                              NULL, 0, &nfbdev->gdi);
        if (ret)
                return ret;
 
-       ret = nvif_object_init(&chan->user, 0x005f,
+       ret = nvif_object_ctor(&chan->user, "fbconImageBlit", 0x005f,
                               device->info.chipset >= 0x11 ? 0x009f : 0x005f,
                               NULL, 0, &nfbdev->blit);
        if (ret)
                return ret;
 
-       if (RING_SPACE(chan, 49 + (device->info.chipset >= 0x11 ? 4 : 0))) {
+       if (PUSH_WAIT(push, 49 + (device->info.chipset >= 0x11 ? 4 : 0))) {
                nouveau_fbcon_gpu_lockup(info);
                return 0;
        }
 
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, nfbdev->surf2d.handle);
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0184, 2);
-       OUT_RING(chan, chan->vram.handle);
-       OUT_RING(chan, chan->vram.handle);
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 4);
-       OUT_RING(chan, surface_fmt);
-       OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
-       OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
-       OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
-
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, nfbdev->rop.handle);
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 1);
-       OUT_RING(chan, 0x55);
-
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, nfbdev->patt.handle);
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 8);
-       OUT_RING(chan, pattern_fmt);
+       PUSH_NVSQ(push, NV042, 0x0000, nfbdev->surf2d.handle);
+       PUSH_NVSQ(push, NV042, 0x0184, chan->vram.handle,
+                              0x0188, chan->vram.handle);
+       PUSH_NVSQ(push, NV042, 0x0300, surface_fmt,
+                              0x0304, info->fix.line_length | (info->fix.line_length << 16),
+                              0x0308, info->fix.smem_start - dev->mode_config.fb_base,
+                              0x030c, info->fix.smem_start - dev->mode_config.fb_base);
+
+       PUSH_NVSQ(push, NV043, 0x0000, nfbdev->rop.handle);
+       PUSH_NVSQ(push, NV043, 0x0300, 0x55);
+
+       PUSH_NVSQ(push, NV044, 0x0000, nfbdev->patt.handle);
+       PUSH_NVSQ(push, NV044, 0x0300, pattern_fmt,
 #ifdef __BIG_ENDIAN
-       OUT_RING(chan, 2);
+                              0x0304, 2,
 #else
-       OUT_RING(chan, 1);
+                              0x0304, 1,
 #endif
-       OUT_RING(chan, 0);
-       OUT_RING(chan, 1);
-       OUT_RING(chan, ~0);
-       OUT_RING(chan, ~0);
-       OUT_RING(chan, ~0);
-       OUT_RING(chan, ~0);
-
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, nfbdev->clip.handle);
-       BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 2);
-       OUT_RING(chan, 0);
-       OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
-
-       BEGIN_NV04(chan, NvSubImageBlit, 0x0000, 1);
-       OUT_RING(chan, nfbdev->blit.handle);
-       BEGIN_NV04(chan, NvSubImageBlit, 0x019c, 1);
-       OUT_RING(chan, nfbdev->surf2d.handle);
-       BEGIN_NV04(chan, NvSubImageBlit, 0x02fc, 1);
-       OUT_RING(chan, 3);
-       if (device->info.chipset >= 0x11 /*XXX: oclass == 0x009f*/) {
-               BEGIN_NV04(chan, NvSubImageBlit, 0x0120, 3);
-               OUT_RING(chan, 0);
-               OUT_RING(chan, 1);
-               OUT_RING(chan, 2);
+                              0x0308, 0,
+                              0x030c, 1,
+                              0x0310, ~0,
+                              0x0314, ~0,
+                              0x0318, ~0,
+                              0x031c, ~0);
+
+       PUSH_NVSQ(push, NV019, 0x0000, nfbdev->clip.handle);
+       PUSH_NVSQ(push, NV019, 0x0300, 0,
+                              0x0304, (info->var.yres_virtual << 16) | info->var.xres_virtual);
+
+       PUSH_NVSQ(push, NV05F, 0x0000, nfbdev->blit.handle);
+       PUSH_NVSQ(push, NV05F, 0x019c, nfbdev->surf2d.handle);
+       PUSH_NVSQ(push, NV05F, 0x02fc, 3);
+       if (nfbdev->blit.oclass == 0x009f) {
+               PUSH_NVSQ(push, NV09F, 0x0120, 0,
+                                      0x0124, 1,
+                                      0x0128, 2);
        }
 
-       BEGIN_NV04(chan, NvSubGdiRect, 0x0000, 1);
-       OUT_RING(chan, nfbdev->gdi.handle);
-       BEGIN_NV04(chan, NvSubGdiRect, 0x0198, 1);
-       OUT_RING(chan, nfbdev->surf2d.handle);
-       BEGIN_NV04(chan, NvSubGdiRect, 0x0188, 2);
-       OUT_RING(chan, nfbdev->patt.handle);
-       OUT_RING(chan, nfbdev->rop.handle);
-       BEGIN_NV04(chan, NvSubGdiRect, 0x0304, 1);
-       OUT_RING(chan, 1);
-       BEGIN_NV04(chan, NvSubGdiRect, 0x0300, 1);
-       OUT_RING(chan, rect_fmt);
-       BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1);
-       OUT_RING(chan, 3);
-
-       FIRE_RING(chan);
+       PUSH_NVSQ(push, NV04A, 0x0000, nfbdev->gdi.handle);
+       PUSH_NVSQ(push, NV04A, 0x0198, nfbdev->surf2d.handle);
+       PUSH_NVSQ(push, NV04A, 0x0188, nfbdev->patt.handle,
+                              0x018c, nfbdev->rop.handle);
+       PUSH_NVSQ(push, NV04A, 0x0304, 1);
+       PUSH_NVSQ(push, NV04A, 0x0300, rect_fmt);
+       PUSH_NVSQ(push, NV04A, 0x02fc, 3);
 
+       PUSH_KICK(push);
        return 0;
 }