drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw image_set()

[linux-2.6-microblaze.git] / drivers / gpu / drm / nouveau / dispnv50 / base827c.c

diff --git a/drivers/gpu/drm/nouveau/dispnv50/base827c.c b/drivers/gpu/drm/nouveau/dispnv50/base827c.c
index c199519..18d3409 100644 (file)
--- a/drivers/gpu/drm/nouveau/dispnv50/base827c.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/base827c.c
@@ -23,6 +23,8 @@
 
 #include <nvif/push507c.h>
 
+#include <nvhw/class/cl827c.h>
+
 static int
 base827c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 {
@@ -32,24 +34,42 @@ base827c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
        if ((ret = PUSH_WAIT(push, 13)))
                return ret;
 
-       PUSH_NVSQ(push, NV827C, 0x0084, asyw->image.mode << 8 |
-                                       asyw->image.interval << 4);
-       PUSH_NVSQ(push, NV827C, 0x00c0, asyw->image.handle[0]);
-       if (asyw->image.format == 0xca) {
-               PUSH_NVSQ(push, NV827C, 0x0110, 1,
-                                       0x0114, 0x6400);
+       PUSH_MTHD(push, NV827C, SET_PRESENT_CONTROL,
+                 NVVAL(NV827C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
+                 NVVAL(NV827C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
+
+       PUSH_MTHD(push, NV827C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1);
+
+       if (asyw->image.format == NV827C_SURFACE_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16) {
+               PUSH_MTHD(push, NV827C, SET_PROCESSING,
+                         NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, ENABLE),
+
+                                       SET_CONVERSION,
+                         NVVAL(NV827C, SET_CONVERSION, GAIN, 0) |
+                         NVVAL(NV827C, SET_CONVERSION, OFS, 0x64));
        } else {
-               PUSH_NVSQ(push, NV827C, 0x0110, 0,
-                                       0x0114, 0);
+               PUSH_MTHD(push, NV827C, SET_PROCESSING,
+                         NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, DISABLE));
        }
-       PUSH_NVSQ(push, NV827C, 0x0800, asyw->image.offset[0] >> 8,
-                               0x0804, 0x00000000,
-                               0x0808, asyw->image.h << 16 | asyw->image.w,
-                               0x080c, asyw->image.layout << 20 |
-                                      (asyw->image.pitch[0] >> 8) << 8 |
-                                       asyw->image.blocks[0] << 8 |
-                                       asyw->image.blockh,
-                               0x0810, asyw->image.format << 8);
+
+       PUSH_MTHD(push, NV827C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8,
+                               SURFACE_SET_OFFSET(0, 1), 0x00000000,
+
+                               SURFACE_SET_SIZE(0),
+                 NVVAL(NV827C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
+                 NVVAL(NV827C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
+
+                               SURFACE_SET_STORAGE(0),
+                 NVVAL(NV827C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
+                 NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
+                 NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
+                 NVVAL(NV827C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
+
+                               SURFACE_SET_PARAMS(0),
+                 NVVAL(NV827C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
+                 NVDEF(NV827C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
+                 NVDEF(NV827C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
+                 NVDEF(NV827C, SURFACE_SET_PARAMS, LAYOUT, FRM));
        return 0;
 }