drm/msm: pass dump state as a function argument

[linux-2.6-microblaze.git] / drivers / gpu / drm / msm / disp / dpu1 / dpu_kms.c

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 85f2c35..e500a92 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -14,10 +14,12 @@
 
 #include <drm/drm_crtc.h>
 #include <drm/drm_file.h>
+#include <drm/drm_vblank.h>
 
 #include "msm_drv.h"
 #include "msm_mmu.h"
 #include "msm_gem.h"
+#include "disp/msm_disp_snapshot.h"
 
 #include "dpu_kms.h"
 #include "dpu_core_irq.h"
@@ -797,6 +799,51 @@ static void dpu_irq_uninstall(struct msm_kms *kms)
        dpu_core_irq_uninstall(dpu_kms);
 }
 
+static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_kms *kms)
+{
+       int i;
+       struct dpu_kms *dpu_kms;
+       struct dpu_mdss_cfg *cat;
+       struct dpu_hw_mdp *top;
+
+       dpu_kms = to_dpu_kms(kms);
+
+       cat = dpu_kms->catalog;
+       top = dpu_kms->hw_mdp;
+
+       pm_runtime_get_sync(&dpu_kms->pdev->dev);
+
+       /* dump CTL sub-blocks HW regs info */
+       for (i = 0; i < cat->ctl_count; i++)
+               msm_disp_snapshot_add_block(disp_state, cat->ctl[i].len,
+                               dpu_kms->mmio + cat->ctl[i].base, "ctl_%d", i);
+
+       /* dump DSPP sub-blocks HW regs info */
+       for (i = 0; i < cat->dspp_count; i++)
+               msm_disp_snapshot_add_block(disp_state, cat->dspp[i].len,
+                               dpu_kms->mmio + cat->dspp[i].base, "dspp_%d", i);
+
+       /* dump INTF sub-blocks HW regs info */
+       for (i = 0; i < cat->intf_count; i++)
+               msm_disp_snapshot_add_block(disp_state, cat->intf[i].len,
+                               dpu_kms->mmio + cat->intf[i].base, "intf_%d", i);
+
+       /* dump PP sub-blocks HW regs info */
+       for (i = 0; i < cat->pingpong_count; i++)
+               msm_disp_snapshot_add_block(disp_state, cat->pingpong[i].len,
+                               dpu_kms->mmio + cat->pingpong[i].base, "pingpong_%d", i);
+
+       /* dump SSPP sub-blocks HW regs info */
+       for (i = 0; i < cat->sspp_count; i++)
+               msm_disp_snapshot_add_block(disp_state, cat->sspp[i].len,
+                               dpu_kms->mmio + cat->sspp[i].base, "sspp_%d", i);
+
+       msm_disp_snapshot_add_block(disp_state, top->hw.length,
+                       dpu_kms->mmio + top->hw.blk_off, "top");
+
+       pm_runtime_put_sync(&dpu_kms->pdev->dev);
+}
+
 static const struct msm_kms_funcs kms_funcs = {
        .hw_init         = dpu_kms_hw_init,
        .irq_preinstall  = dpu_irq_preinstall,
@@ -817,6 +864,7 @@ static const struct msm_kms_funcs kms_funcs = {
        .round_pixclk    = dpu_kms_round_pixclk,
        .destroy         = dpu_kms_destroy,
        .set_encoder_mode = _dpu_kms_set_encoder_mode,
+       .snapshot        = dpu_kms_mdp_snapshot,
 #ifdef CONFIG_DEBUG_FS
        .debugfs_init    = dpu_kms_debugfs_init,
 #endif
@@ -933,8 +981,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
                DPU_DEBUG("REG_DMA is not defined");
        }
 
-       if (of_device_is_compatible(dev->dev->of_node, "qcom,sc7180-mdss"))
-               dpu_kms_parse_data_bus_icc_path(dpu_kms);
+       dpu_kms_parse_data_bus_icc_path(dpu_kms);
 
        pm_runtime_get_sync(&dpu_kms->pdev->dev);
 
@@ -1025,6 +1072,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
         */
        dev->mode_config.allow_fb_modifiers = true;
 
+       dev->max_vblank_count = 0xffffffff;
+       /* Disable vblank irqs aggressively for power-saving */
+       dev->vblank_disable_immediate = true;
+
        /*
         * _dpu_kms_drm_obj_init should create the DRM related objects
         * i.e. CRTCs, planes, encoders, connectors and so forth
@@ -1221,6 +1272,9 @@ static const struct dev_pm_ops dpu_pm_ops = {
 static const struct of_device_id dpu_dt_match[] = {
        { .compatible = "qcom,sdm845-dpu", },
        { .compatible = "qcom,sc7180-dpu", },
+       { .compatible = "qcom,sc7280-dpu", },
+       { .compatible = "qcom,sm8150-dpu", },
+       { .compatible = "qcom,sm8250-dpu", },
        {}
 };
 MODULE_DEVICE_TABLE(of, dpu_dt_match);