drm/i915/ehl: Set proper eu slice/subslice parameters for EHL

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / intel_huc_fw.c

diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c b/drivers/gpu/drm/i915/intel_huc_fw.c
index f93d238..92799b8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -23,8 +23,8 @@
  */
 
 #define BXT_HUC_FW_MAJOR 01
-#define BXT_HUC_FW_MINOR 07
-#define BXT_BLD_NUM 1398
+#define BXT_HUC_FW_MINOR 8
+#define BXT_BLD_NUM 2893
 
 #define SKL_HUC_FW_MAJOR 01
 #define SKL_HUC_FW_MINOR 07
@@ -76,9 +76,6 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
                huc_fw->path = I915_KBL_HUC_UCODE;
                huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
                huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
-       } else {
-               DRM_WARN("%s: No firmware known for this platform!\n",
-                        intel_uc_fw_type_repr(huc_fw->type));
        }
 }
 
@@ -115,7 +112,7 @@ static int huc_fw_xfer(struct intel_uc_fw *huc_fw, struct i915_vma *vma)
 
        GEM_BUG_ON(huc_fw->type != INTEL_UC_FW_TYPE_HUC);
 
-       intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
 
        /* Set the source address for the uCode */
        offset = intel_guc_ggtt_offset(&dev_priv->guc, vma) +
@@ -143,7 +140,7 @@ static int huc_fw_xfer(struct intel_uc_fw *huc_fw, struct i915_vma *vma)
        /* Disable the bits once DMA is over */
        I915_WRITE(DMA_CTRL, _MASKED_BIT_DISABLE(HUC_UKERNEL));
 
-       intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+       intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 
        return ret;
 }