Merge tag 'drm-intel-gt-next-2022-07-13' of git://anongit.freedesktop.org/drm/drm...

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / intel_device_info.h

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 677fb68..23bf230 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -219,8 +219,6 @@ struct intel_device_info {
 
        u32 memory_regions; /* regions supported by the HW */
 
-       u32 display_mmio_offset;
-
        u8 gt; /* GT number, 0 if undefined */
 
 #define DEFINE_FLAG(name) u8 name:1
@@ -236,27 +234,30 @@ struct intel_device_info {
                u8 fbc_mask;
                u8 abox_mask;
 
+               struct {
+                       u16 size; /* in blocks */
+                       u8 slice_mask;
+               } dbuf;
+
 #define DEFINE_FLAG(name) u8 name:1
                DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
 #undef DEFINE_FLAG
-       } display;
 
-       struct {
-               u16 size; /* in blocks */
-               u8 slice_mask;
-       } dbuf;
-
-       /* Register offsets for the various display pipes and transcoders */
-       int pipe_offsets[I915_MAX_TRANSCODERS];
-       int trans_offsets[I915_MAX_TRANSCODERS];
-       int cursor_offsets[I915_MAX_PIPES];
-
-       struct color_luts {
-               u32 degamma_lut_size;
-               u32 gamma_lut_size;
-               u32 degamma_lut_tests;
-               u32 gamma_lut_tests;
-       } color;
+               /* Global register offset for the display engine */
+               u32 mmio_offset;
+
+               /* Register offsets for the various display pipes and transcoders */
+               u32 pipe_offsets[I915_MAX_TRANSCODERS];
+               u32 trans_offsets[I915_MAX_TRANSCODERS];
+               u32 cursor_offsets[I915_MAX_PIPES];
+
+               struct {
+                       u32 degamma_lut_size;
+                       u32 gamma_lut_size;
+                       u32 degamma_lut_tests;
+                       u32 gamma_lut_tests;
+               } color;
+       } display;
 };
 
 struct intel_runtime_info {