Merge tag 'drm-intel-next-2019-04-04' into gvt-next

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / intel_device_info.h

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 7e04b48..0e579f1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -27,6 +27,7 @@
 
 #include <uapi/drm/i915_drm.h>
 
+#include "intel_engine_types.h"
 #include "intel_display.h"
 
 struct drm_printer;
@@ -77,6 +78,21 @@ enum intel_platform {
        INTEL_MAX_PLATFORMS
 };
 
+/*
+ * Subplatform bits share the same namespace per parent platform. In other words
+ * it is fine for the same bit to be used on multiple parent platforms.
+ */
+
+#define INTEL_SUBPLATFORM_BITS (3)
+
+/* HSW/BDW/SKL/KBL/CFL */
+#define INTEL_SUBPLATFORM_ULT  (0)
+#define INTEL_SUBPLATFORM_ULX  (1)
+#define INTEL_SUBPLATFORM_AML  (2)
+
+/* CNL/ICL */
+#define INTEL_SUBPLATFORM_PORTF        (0)
+
 enum intel_ppgtt_type {
        INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
        INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
@@ -150,8 +166,6 @@ struct sseu_dev_info {
        u8 eu_mask[GEN_MAX_SLICES * GEN_MAX_SUBSLICES];
 };
 
-typedef u8 intel_engine_mask_t;
-
 struct intel_device_info {
        u16 gen_mask;
 
@@ -160,7 +174,6 @@ struct intel_device_info {
        intel_engine_mask_t engine_mask; /* Engines supported by the HW */
 
        enum intel_platform platform;
-       u32 platform_mask;
 
        enum intel_ppgtt_type ppgtt_type;
        unsigned int ppgtt_size; /* log2, e.g. 31/32/48 bits */
@@ -197,6 +210,16 @@ struct intel_device_info {
 };
 
 struct intel_runtime_info {
+       /*
+        * Platform mask is used for optimizing or-ed IS_PLATFORM calls into
+        * into single runtime conditionals, and also to provide groundwork
+        * for future per platform, or per SKU build optimizations.
+        *
+        * Array can be extended when necessary if the corresponding
+        * BUILD_BUG_ON is hit.
+        */
+       u32 platform_mask[2];
+
        u16 device_id;
 
        u8 num_sprites[I915_MAX_PIPES];
@@ -267,6 +290,7 @@ static inline void sseu_set_eus(struct sseu_dev_info *sseu,
 
 const char *intel_platform_name(enum intel_platform platform);
 
+void intel_device_info_subplatform_init(struct drm_i915_private *dev_priv);
 void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
 void intel_device_info_dump_flags(const struct intel_device_info *info,
                                  struct drm_printer *p);