Merge tag 'drm-intel-next-2019-04-04' into gvt-next

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / i915_reset.h

diff --git a/drivers/gpu/drm/i915/i915_reset.h b/drivers/gpu/drm/i915/i915_reset.h
index f2d347f..86b1ac8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reset.h
+++ b/drivers/gpu/drm/i915/i915_reset.h
@@ -9,6 +9,9 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/srcu.h>
+
+#include "intel_engine_types.h"
 
 struct drm_i915_private;
 struct intel_engine_cs;
@@ -16,7 +19,7 @@ struct intel_guc;
 
 __printf(4, 5)
 void i915_handle_error(struct drm_i915_private *i915,
-                      u32 engine_mask,
+                      intel_engine_mask_t engine_mask,
                       unsigned long flags,
                       const char *fmt, ...);
 #define I915_ERROR_CAPTURE BIT(0)
@@ -24,7 +27,7 @@ void i915_handle_error(struct drm_i915_private *i915,
 void i915_clear_error_registers(struct drm_i915_private *i915);
 
 void i915_reset(struct drm_i915_private *i915,
-               unsigned int stalled_mask,
+               intel_engine_mask_t stalled_mask,
                const char *reason);
 int i915_reset_engine(struct intel_engine_cs *engine,
                      const char *reason);
@@ -32,10 +35,16 @@ int i915_reset_engine(struct intel_engine_cs *engine,
 void i915_reset_request(struct i915_request *rq, bool guilty);
 bool i915_reset_flush(struct drm_i915_private *i915);
 
+int __must_check i915_reset_trylock(struct drm_i915_private *i915);
+void i915_reset_unlock(struct drm_i915_private *i915, int tag);
+
+int i915_terminally_wedged(struct drm_i915_private *i915);
+
 bool intel_has_gpu_reset(struct drm_i915_private *i915);
 bool intel_has_reset_engine(struct drm_i915_private *i915);
 
-int intel_gpu_reset(struct drm_i915_private *i915, u32 engine_mask);
+int intel_gpu_reset(struct drm_i915_private *i915,
+                   intel_engine_mask_t engine_mask);
 
 int intel_reset_guc(struct drm_i915_private *i915);