drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8d5bdff..1fb9597 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8350,23 +8350,23 @@ enum {
 
 /* south display engine interrupt: ICP/TGP */
 #define SDE_GMBUS_ICP                  (1 << 23)
-#define SDE_TC_HOTPLUG_ICP(tc_port)    (1 << ((tc_port) + 24))
+#define SDE_TC_HOTPLUG_ICP(hpd_pin)    REG_BIT(24 + _HPD_PIN_TC(hpd_pin))
 #define SDE_DDI_HOTPLUG_ICP(hpd_pin)   REG_BIT(16 + _HPD_PIN_DDI(hpd_pin))
 #define SDE_DDI_MASK_ICP               (SDE_DDI_HOTPLUG_ICP(HPD_PORT_B) | \
                                         SDE_DDI_HOTPLUG_ICP(HPD_PORT_A))
-#define SDE_TC_MASK_ICP                        (SDE_TC_HOTPLUG_ICP(TC_PORT_4) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_3) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_2) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_1))
+#define SDE_TC_MASK_ICP                        (SDE_TC_HOTPLUG_ICP(HPD_PORT_TC4) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC3) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC2) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC1))
 #define SDE_DDI_MASK_TGP               (SDE_DDI_HOTPLUG_ICP(HPD_PORT_C) | \
                                         SDE_DDI_HOTPLUG_ICP(HPD_PORT_B) | \
                                         SDE_DDI_HOTPLUG_ICP(HPD_PORT_A))
-#define SDE_TC_MASK_TGP                        (SDE_TC_HOTPLUG_ICP(TC_PORT_6) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_5) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_4) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_3) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_2) | \
-                                        SDE_TC_HOTPLUG_ICP(TC_PORT_1))
+#define SDE_TC_MASK_TGP                        (SDE_TC_HOTPLUG_ICP(HPD_PORT_TC6) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC5) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC4) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC3) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC2) | \
+                                        SDE_TC_HOTPLUG_ICP(HPD_PORT_TC1))
 #define SDE_DDI_MASK_DG1               (SDE_DDI_HOTPLUG_ICP(HPD_PORT_D) | \
                                         SDE_DDI_HOTPLUG_ICP(HPD_PORT_C) | \
                                         SDE_DDI_HOTPLUG_ICP(HPD_PORT_B) | \
@@ -8446,24 +8446,24 @@ enum {
 #define   SHOTPLUG_CTL_DDI_HPD_SHORT_LONG_DETECT(hpd_pin)      (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
 
 #define SHOTPLUG_CTL_TC                                _MMIO(0xc4034)
-#define   ICP_TC_HPD_ENABLE(tc_port)           (8 << (tc_port) * 4)
-#define   ICP_TC_HPD_LONG_DETECT(tc_port)      (2 << (tc_port) * 4)
-#define   ICP_TC_HPD_SHORT_DETECT(tc_port)     (1 << (tc_port) * 4)
+#define   ICP_TC_HPD_ENABLE(hpd_pin)           (8 << (_HPD_PIN_TC(hpd_pin) * 4))
+#define   ICP_TC_HPD_LONG_DETECT(hpd_pin)      (2 << (_HPD_PIN_TC(hpd_pin) * 4))
+#define   ICP_TC_HPD_SHORT_DETECT(hpd_pin)     (1 << (_HPD_PIN_TC(hpd_pin) * 4))
 
 #define SHPD_FILTER_CNT                                _MMIO(0xc4038)
 #define   SHPD_FILTER_CNT_500_ADJ              0x001D9
 
 #define ICP_DDI_HPD_ENABLE_MASK                (SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) | \
                                         SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A))
-#define ICP_TC_HPD_ENABLE_MASK         (ICP_TC_HPD_ENABLE(TC_PORT_4) | \
-                                        ICP_TC_HPD_ENABLE(TC_PORT_3) | \
-                                        ICP_TC_HPD_ENABLE(TC_PORT_2) | \
-                                        ICP_TC_HPD_ENABLE(TC_PORT_1))
+#define ICP_TC_HPD_ENABLE_MASK         (ICP_TC_HPD_ENABLE(HPD_PORT_TC4) | \
+                                        ICP_TC_HPD_ENABLE(HPD_PORT_TC3) | \
+                                        ICP_TC_HPD_ENABLE(HPD_PORT_TC2) | \
+                                        ICP_TC_HPD_ENABLE(HPD_PORT_TC1))
 #define TGP_DDI_HPD_ENABLE_MASK                (SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_C) | \
                                         SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) | \
                                         SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A))
-#define TGP_TC_HPD_ENABLE_MASK         (ICP_TC_HPD_ENABLE(TC_PORT_6) | \
-                                        ICP_TC_HPD_ENABLE(TC_PORT_5) | \
+#define TGP_TC_HPD_ENABLE_MASK         (ICP_TC_HPD_ENABLE(HPD_PORT_TC6) | \
+                                        ICP_TC_HPD_ENABLE(HPD_PORT_TC5) | \
                                         ICP_TC_HPD_ENABLE_MASK)
 #define DG1_DDI_HPD_ENABLE_MASK                (SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_D) | \
                                         SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_C) | \