drm/i915: Store CS timestamp frequency in Hz

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / i915_perf.c

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 2e61155..205327c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1613,8 +1613,8 @@ static int alloc_noa_wait(struct i915_perf_stream *stream)
        struct i915_vma *vma;
        const u64 delay_ticks = 0xffffffffffffffff -
                DIV_ROUND_UP_ULL(atomic64_read(&stream->perf->noa_programming_delay) *
-                                RUNTIME_INFO(i915)->cs_timestamp_frequency_khz,
-                                1000000);
+                                RUNTIME_INFO(i915)->cs_timestamp_frequency_hz,
+                                1000000000);
        const u32 base = stream->engine->mmio_base;
 #define CS_GPR(x) GEN8_RING_CS_GPR(base, x)
        u32 *batch, *ts0, *cs, *jump;
@@ -3484,8 +3484,8 @@ err:
 
 static u64 oa_exponent_to_ns(struct i915_perf *perf, int exponent)
 {
-       return div_u64(1000000 * (2ULL << exponent),
-                      RUNTIME_INFO(perf->i915)->cs_timestamp_frequency_khz);
+       return div_u64(1000000000 * (2ULL << exponent),
+                      RUNTIME_INFO(perf->i915)->cs_timestamp_frequency_hz);
 }
 
 /**
@@ -4343,8 +4343,8 @@ void i915_perf_init(struct drm_i915_private *i915)
        if (perf->ops.enable_metric_set) {
                mutex_init(&perf->lock);
 
-               oa_sample_rate_hard_limit = 1000 *
-                       (RUNTIME_INFO(i915)->cs_timestamp_frequency_khz / 2);
+               oa_sample_rate_hard_limit =
+                       RUNTIME_INFO(i915)->cs_timestamp_frequency_hz / 2;
 
                mutex_init(&perf->metrics_lock);
                idr_init(&perf->metrics_idr);