drm/i915/gem: Pull phys pread/pwrite implementations to the backend

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / i915_gem.c

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d58fe1d..5827669 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -179,30 +179,6 @@ try_again:
        return ret;
 }
 
-static int
-i915_gem_phys_pwrite(struct drm_i915_gem_object *obj,
-                    struct drm_i915_gem_pwrite *args,
-                    struct drm_file *file)
-{
-       void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset;
-       char __user *user_data = u64_to_user_ptr(args->data_ptr);
-
-       /*
-        * We manually control the domain here and pretend that it
-        * remains coherent i.e. in the GTT domain, like shmem_pwrite.
-        */
-       i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
-
-       if (copy_from_user(vaddr, user_data, args->size))
-               return -EFAULT;
-
-       drm_clflush_virt_range(vaddr, args->size);
-       intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
-
-       i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
-       return 0;
-}
-
 static int
 i915_gem_create(struct drm_file *file,
                struct intel_memory_region *mr,
@@ -872,8 +848,6 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
        if (ret == -EFAULT || ret == -ENOSPC) {
                if (i915_gem_object_has_struct_page(obj))
                        ret = i915_gem_shmem_pwrite(obj, args);
-               else
-                       ret = i915_gem_phys_pwrite(obj, args, file);
        }
 
        i915_gem_object_unpin_pages(obj);