Merge tag 'drm-intel-gt-next-2023-09-28' of git://anongit.freedesktop.org/drm/drm...

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / gt / intel_workarounds.c

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 0ddddcc..b86a10b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -420,7 +420,7 @@ static void bdw_ctx_workarounds_init(struct intel_engine_cs *engine,
                     /* WaForceContextSaveRestoreNonCoherent:bdw */
                     HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
                     /* WaDisableFenceDestinationToSLM:bdw (pre-prod) */
-                    (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
+                    (IS_BROADWELL_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
 }
 
 static void chv_ctx_workarounds_init(struct intel_engine_cs *engine,
@@ -600,7 +600,7 @@ static void kbl_ctx_workarounds_init(struct intel_engine_cs *engine,
        gen9_ctx_workarounds_init(engine, wal);
 
        /* WaToEnableHwFixForPushConstHWBug:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
                wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
                             GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
 
@@ -1165,7 +1165,7 @@ skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
                    GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
 
        /* WaInPlaceDecompressionHang:skl */
-       if (IS_SKL_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0))
+       if (IS_SKYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0))
                wa_write_or(wal,
                            GEN9_GAMT_ECO_REG_RW_IA,
                            GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
@@ -1177,7 +1177,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
        gen9_gt_workarounds_init(gt, wal);
 
        /* WaDisableDynamicCreditSharing:kbl */
-       if (IS_KBL_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
+       if (IS_KABYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
                wa_write_or(wal,
                            GAMT_CHKN_BIT_REG,
                            GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
@@ -1433,7 +1433,8 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 
        /* Wa_1607087056:icl,ehl,jsl */
        if (IS_ICELAKE(i915) ||
-           IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
+               ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) &&
+               IS_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)))
                wa_write_or(wal,
                            GEN11_SLICE_UNIT_LEVEL_CLKGATE,
                            L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
@@ -2775,7 +2776,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
        struct drm_i915_private *i915 = engine->i915;
 
        /* WaKBLVECSSemaphoreWaitPoll:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
                wa_write(wal,
                         RING_SEMA_WAIT_POLL(engine->mmio_base),
                         1);