Merge drm/drm-next into drm-intel-gt-next

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / gem / i915_gem_dmabuf.c

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index e8a58c9..f291cf4 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -17,6 +17,13 @@
 
 MODULE_IMPORT_NS(DMA_BUF);
 
+#if defined(CONFIG_X86)
+#include <asm/smp.h>
+#else
+#define wbinvd_on_all_cpus() \
+       pr_warn(DRIVER_NAME ": Missing cache flush in %s\n", __func__)
+#endif
+
 I915_SELFTEST_DECLARE(static bool force_different_devices;)
 
 static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
@@ -248,8 +255,19 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
        if (IS_ERR(pages))
                return PTR_ERR(pages);
 
-       /* XXX: consider doing a vmap flush or something */
-       if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
+       /*
+        * DG1 is special here since it still snoops transactions even with
+        * CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We
+        * might need to revisit this as we add new discrete platforms.
+        *
+        * XXX: Consider doing a vmap flush or something, where possible.
+        * Currently we just do a heavy handed wbinvd_on_all_cpus() here since
+        * the underlying sg_table might not even point to struct pages, so we
+        * can't just call drm_clflush_sg or similar, like we do elsewhere in
+        * the driver.
+        */
+       if (i915_gem_object_can_bypass_llc(obj) ||
+           (!HAS_LLC(i915) && !IS_DG1(i915)))
                wbinvd_on_all_cpus();
 
        sg_page_sizes = i915_sg_dma_sizes(pages->sgl);