drm/i915: prefer 3-letter acronym for ivybridge
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / display / intel_hdmi.c
index f6f5312..6855890 100644 (file)
@@ -285,7 +285,7 @@ static void ibx_write_infoframe(struct intel_encoder *encoder,
 {
        const u32 *data = frame;
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
        int i;
@@ -321,7 +321,7 @@ static void ibx_read_infoframe(struct intel_encoder *encoder,
                               void *frame, ssize_t len)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        u32 val, *data = frame;
        int i;
 
@@ -340,7 +340,7 @@ static u32 ibx_infoframes_enabled(struct intel_encoder *encoder,
                                  const struct intel_crtc_state *pipe_config)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
+       enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
        i915_reg_t reg = TVIDEO_DIP_CTL(pipe);
        u32 val = I915_READ(reg);
 
@@ -362,7 +362,7 @@ static void cpt_write_infoframe(struct intel_encoder *encoder,
 {
        const u32 *data = frame;
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
        int i;
@@ -401,7 +401,7 @@ static void cpt_read_infoframe(struct intel_encoder *encoder,
                               void *frame, ssize_t len)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        u32 val, *data = frame;
        int i;
 
@@ -420,7 +420,7 @@ static u32 cpt_infoframes_enabled(struct intel_encoder *encoder,
                                  const struct intel_crtc_state *pipe_config)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
+       enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
        u32 val = I915_READ(TVIDEO_DIP_CTL(pipe));
 
        if ((val & VIDEO_DIP_ENABLE) == 0)
@@ -438,7 +438,7 @@ static void vlv_write_infoframe(struct intel_encoder *encoder,
 {
        const u32 *data = frame;
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
        int i;
@@ -474,7 +474,7 @@ static void vlv_read_infoframe(struct intel_encoder *encoder,
                               void *frame, ssize_t len)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        u32 val, *data = frame;
        int i;
 
@@ -493,7 +493,7 @@ static u32 vlv_infoframes_enabled(struct intel_encoder *encoder,
                                  const struct intel_crtc_state *pipe_config)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe;
+       enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe;
        u32 val = I915_READ(VLV_TVIDEO_DIP_CTL(pipe));
 
        if ((val & VIDEO_DIP_ENABLE) == 0)
@@ -708,7 +708,7 @@ intel_hdmi_compute_avi_infoframe(struct intel_encoder *encoder,
 {
        struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
        const struct drm_display_mode *adjusted_mode =
-               &crtc_state->base.adjusted_mode;
+               &crtc_state->hw.adjusted_mode;
        struct drm_connector *connector = conn_state->connector;
        int ret;
 
@@ -804,7 +804,7 @@ intel_hdmi_compute_hdmi_infoframe(struct intel_encoder *encoder,
 
        ret = drm_hdmi_vendor_infoframe_from_display_mode(frame,
                                                          conn_state->connector,
-                                                         &crtc_state->base.adjusted_mode);
+                                                         &crtc_state->hw.adjusted_mode);
        if (WARN_ON(ret))
                return false;
 
@@ -965,7 +965,7 @@ static bool intel_hdmi_set_gcp_infoframe(struct intel_encoder *encoder,
                                         const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        i915_reg_t reg;
 
        if ((crtc_state->infoframes.enable &
@@ -990,7 +990,7 @@ void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder,
                                   struct intel_crtc_state *crtc_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        i915_reg_t reg;
 
        if ((crtc_state->infoframes.enable &
@@ -1027,7 +1027,7 @@ static void intel_hdmi_compute_gcp_infoframe(struct intel_encoder *encoder,
 
        /* Enable default_phase whenever the display mode is suitably aligned */
        if (gcp_default_phase_possible(crtc_state->pipe_bpp,
-                                      &crtc_state->base.adjusted_mode))
+                                      &crtc_state->hw.adjusted_mode))
                crtc_state->infoframes.gcp |= GCP_DEFAULT_PHASE_ENABLE;
 }
 
@@ -1037,7 +1037,7 @@ static void ibx_set_infoframes(struct intel_encoder *encoder,
                               const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct intel_digital_port *intel_dig_port = enc_to_dig_port(&encoder->base);
        struct intel_hdmi *intel_hdmi = &intel_dig_port->hdmi;
        i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
@@ -1096,7 +1096,7 @@ static void cpt_set_infoframes(struct intel_encoder *encoder,
                               const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
@@ -1145,7 +1145,7 @@ static void vlv_set_infoframes(struct intel_encoder *encoder,
                               const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
        u32 val = I915_READ(reg);
@@ -1736,9 +1736,9 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder,
 {
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
-       const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
+       const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
        u32 hdmi_val;
 
        intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
@@ -1829,7 +1829,7 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
            tmp & HDMI_COLOR_RANGE_16_235)
                pipe_config->limited_color_range = true;
 
-       pipe_config->base.adjusted_mode.flags |= flags;
+       pipe_config->hw.adjusted_mode.flags |= flags;
 
        if ((tmp & SDVO_COLOR_FORMAT_MASK) == HDMI_COLOR_FORMAT_12bpc)
                dotclock = pipe_config->port_clock * 2 / 3;
@@ -1839,7 +1839,7 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
        if (pipe_config->pixel_multiplier)
                dotclock /= pipe_config->pixel_multiplier;
 
-       pipe_config->base.adjusted_mode.crtc_clock = dotclock;
+       pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
 
        pipe_config->lane_count = 4;
 
@@ -1860,7 +1860,7 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder,
                                    const struct intel_crtc_state *pipe_config,
                                    const struct drm_connector_state *conn_state)
 {
-       struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 
        WARN_ON(!pipe_config->has_hdmi_sink);
        DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
@@ -1946,7 +1946,7 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder,
 {
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        enum pipe pipe = crtc->pipe;
        u32 temp;
@@ -2010,7 +2010,7 @@ static void intel_disable_hdmi(struct intel_encoder *encoder,
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        struct intel_digital_port *intel_dig_port =
                hdmi_to_dig_port(intel_hdmi);
-       struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+       struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
        u32 temp;
 
        temp = I915_READ(intel_hdmi->hdmi_reg);
@@ -2210,12 +2210,12 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
                                     int bpc)
 {
        struct drm_i915_private *dev_priv =
-               to_i915(crtc_state->base.crtc->dev);
-       struct drm_atomic_state *state = crtc_state->base.state;
+               to_i915(crtc_state->uapi.crtc->dev);
+       struct drm_atomic_state *state = crtc_state->uapi.state;
        struct drm_connector_state *connector_state;
        struct drm_connector *connector;
        const struct drm_display_mode *adjusted_mode =
-               &crtc_state->base.adjusted_mode;
+               &crtc_state->hw.adjusted_mode;
        int i;
 
        if (HAS_GMCH(dev_priv))
@@ -2240,7 +2240,7 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
        for_each_new_connector_in_state(state, connector, connector_state, i) {
                const struct drm_display_info *info = &connector->display_info;
 
-               if (connector_state->crtc != crtc_state->base.crtc)
+               if (connector_state->crtc != crtc_state->uapi.crtc)
                        continue;
 
                if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
@@ -2281,7 +2281,7 @@ static bool
 intel_hdmi_ycbcr420_config(struct drm_connector *connector,
                           struct intel_crtc_state *config)
 {
-       struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc);
+       struct intel_crtc *intel_crtc = to_intel_crtc(config->uapi.crtc);
 
        if (!connector->ycbcr_420_allowed) {
                DRM_ERROR("Platform doesn't support YCBCR420 output\n");
@@ -2336,7 +2336,7 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
 {
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        const struct drm_display_mode *adjusted_mode =
-               &crtc_state->base.adjusted_mode;
+               &crtc_state->hw.adjusted_mode;
        int bpc, clock = adjusted_mode->crtc_clock;
 
        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
@@ -2378,7 +2378,7 @@ static bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_s
        const struct intel_digital_connector_state *intel_conn_state =
                to_intel_digital_connector_state(conn_state);
        const struct drm_display_mode *adjusted_mode =
-               &crtc_state->base.adjusted_mode;
+               &crtc_state->hw.adjusted_mode;
 
        /*
         * Our YCbCr output is always limited range.
@@ -2406,7 +2406,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 {
        struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
+       struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
        struct drm_connector *connector = conn_state->connector;
        struct drm_scdc *scdc = &connector->display_info.hdmi.scdc;
        struct intel_digital_connector_state *intel_conn_state =
@@ -2451,8 +2451,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
        if (ret)
                return ret;
 
-       /* Set user selected PAR to incoming mode's member */
-       adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
+       if (conn_state->picture_aspect_ratio)
+               adjusted_mode->picture_aspect_ratio =
+                       conn_state->picture_aspect_ratio;
 
        pipe_config->lane_count = 4;
 
@@ -2489,9 +2490,6 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
                return -EINVAL;
        }
 
-       intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
-                                    pipe_config->cpu_transcoder);
-
        return 0;
 }
 
@@ -2875,7 +2873,6 @@ intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *c
                intel_attach_colorspace_property(connector);
 
        drm_connector_attach_content_type_property(connector);
-       connector->state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
 
        if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
                drm_object_attach_property(&connector->base,
@@ -3134,20 +3131,29 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
        struct intel_encoder *intel_encoder = &intel_dig_port->base;
        struct drm_device *dev = intel_encoder->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
+       struct i2c_adapter *ddc;
        enum port port = intel_encoder->port;
        struct cec_connector_info conn_info;
 
        DRM_DEBUG_KMS("Adding HDMI connector on [ENCODER:%d:%s]\n",
                      intel_encoder->base.base.id, intel_encoder->base.name);
 
+       if (INTEL_GEN(dev_priv) < 12 && WARN_ON(port == PORT_A))
+               return;
+
        if (WARN(intel_dig_port->max_lanes < 4,
                 "Not enough lanes (%d) for HDMI on [ENCODER:%d:%s]\n",
                 intel_dig_port->max_lanes, intel_encoder->base.base.id,
                 intel_encoder->base.name))
                return;
 
-       drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
-                          DRM_MODE_CONNECTOR_HDMIA);
+       intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
+       ddc = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus);
+
+       drm_connector_init_with_ddc(dev, connector,
+                                   &intel_hdmi_connector_funcs,
+                                   DRM_MODE_CONNECTOR_HDMIA,
+                                   ddc);
        drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
 
        connector->interlace_allowed = 1;
@@ -3157,10 +3163,6 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
        if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
                connector->ycbcr_420_allowed = true;
 
-       intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
-
-       if (WARN_ON(port == PORT_A))
-               return;
        intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
        if (HAS_DDI(dev_priv))