drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platforms

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / display / intel_display_power.c

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 31cb9ac..fe2d90b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -5852,10 +5852,15 @@ static void intel_power_domains_verify_state(struct drm_i915_private *i915)
 
 void intel_display_power_suspend_late(struct drm_i915_private *i915)
 {
-       if (INTEL_GEN(i915) >= 11 || IS_GEN9_LP(i915))
+       if (INTEL_GEN(i915) >= 11 || IS_GEN9_LP(i915)) {
                bxt_enable_dc9(i915);
-       else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+               /* Tweaked Wa_14010685332:icp,jsp,mcc */
+               if (INTEL_PCH_TYPE(i915) >= PCH_ICP && INTEL_PCH_TYPE(i915) <= PCH_MCC)
+                       intel_de_rmw(i915, SOUTH_CHICKEN1,
+                                    SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
+       } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
                hsw_enable_pc8(i915);
+       }
 }
 
 void intel_display_power_resume_early(struct drm_i915_private *i915)
@@ -5863,6 +5868,10 @@ void intel_display_power_resume_early(struct drm_i915_private *i915)
        if (INTEL_GEN(i915) >= 11 || IS_GEN9_LP(i915)) {
                gen9_sanitize_dc_state(i915);
                bxt_disable_dc9(i915);
+               /* Tweaked Wa_14010685332:icp,jsp,mcc */
+               if (INTEL_PCH_TYPE(i915) >= PCH_ICP && INTEL_PCH_TYPE(i915) <= PCH_MCC)
+                       intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);
+
        } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
                hsw_disable_pc8(i915);
        }