drm/i915: move is_ccs_modifier to an inline
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / display / intel_display.h
index 5e0d42d..2bbd2ee 100644 (file)
@@ -52,6 +52,7 @@ struct intel_crtc_state;
 struct intel_digital_port;
 struct intel_dp;
 struct intel_encoder;
+struct intel_initial_plane_config;
 struct intel_load_detect_pipe;
 struct intel_plane;
 struct intel_plane_state;
@@ -417,10 +418,19 @@ enum phy_fia {
                for_each_if((encoder_mask) &                            \
                            drm_encoder_mask(&intel_encoder->base))
 
+#define for_each_intel_encoder_mask_can_psr(dev, intel_encoder, encoder_mask) \
+       list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
+               for_each_if(((encoder_mask) & drm_encoder_mask(&(intel_encoder)->base)) && \
+                           intel_encoder_can_psr(intel_encoder))
+
 #define for_each_intel_dp(dev, intel_encoder)                  \
        for_each_intel_encoder(dev, intel_encoder)              \
                for_each_if(intel_encoder_is_dp(intel_encoder))
 
+#define for_each_intel_encoder_can_psr(dev, intel_encoder) \
+       for_each_intel_encoder((dev), (intel_encoder)) \
+               for_each_if(intel_encoder_can_psr(intel_encoder))
+
 #define for_each_intel_connector_iter(intel_connector, iter) \
        while ((intel_connector = to_intel_connector(drm_connector_list_iter_next(iter))))
 
@@ -499,14 +509,14 @@ enum phy_fia {
                             ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
                             (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))
 
+int intel_atomic_add_affected_planes(struct intel_atomic_state *state,
+                                    struct intel_crtc *crtc);
 u8 intel_calc_active_pipes(struct intel_atomic_state *state,
                           u8 active_pipes);
 void intel_link_compute_m_n(u16 bpp, int nlanes,
                            int pixel_clock, int link_clock,
                            struct intel_link_m_n *m_n,
                            bool constant_n, bool fec_enable);
-bool is_ccs_modifier(u64 modifier);
-int intel_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
 void lpt_disable_clkout_dp(struct drm_i915_private *dev_priv);
 u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
                              u32 pixel_format, u64 modifier);
@@ -544,7 +554,6 @@ unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info
 unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info);
 bool intel_has_pending_fb_unpin(struct drm_i915_private *dev_priv);
 int intel_display_suspend(struct drm_device *dev);
-void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv);
 void intel_encoder_destroy(struct drm_encoder *encoder);
 struct drm_display_mode *
 intel_encoder_current_mode(struct intel_encoder *encoder);
@@ -619,20 +628,7 @@ u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter, int set);
 void skl_scaler_setup_filter(struct drm_i915_private *dev_priv, enum pipe pipe,
                             int id, int set, enum drm_scaling_filter filter);
 void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state);
-u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
-                       const struct intel_plane_state *plane_state);
-u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state);
-u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
-                 const struct intel_plane_state *plane_state);
-u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state);
-u32 skl_plane_stride(const struct intel_plane_state *plane_state,
-                    int plane);
-int skl_check_plane_surface(struct intel_plane_state *plane_state);
-int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
-int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
-unsigned int i9xx_plane_max_stride(struct intel_plane *plane,
-                                  u32 pixel_format, u64 modifier,
-                                  unsigned int rotation);
+
 int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
 unsigned int intel_plane_fence_y_offset(const struct intel_plane_state *plane_state);
 
@@ -643,7 +639,29 @@ void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
 
 bool
 intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
-                                   uint64_t modifier);
+                                   u64 modifier);
+
+int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
+u32 intel_plane_compute_aligned_offset(int *x, int *y,
+                                      const struct intel_plane_state *state,
+                                      int color_plane);
+int intel_plane_pin_fb(struct intel_plane_state *plane_state);
+void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
+struct intel_encoder *
+intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
+                          const struct intel_crtc_state *crtc_state);
+
+unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
+                                 int color_plane);
+void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
+                                   const struct drm_framebuffer *fb,
+                                   int color_plane);
+u32 intel_plane_adjust_aligned_offset(int *x, int *y,
+                                     const struct intel_plane_state *state,
+                                     int color_plane,
+                                     u32 old_offset, u32 new_offset);
+unsigned int intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane);
+unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
 
 /* modesetting */
 void intel_modeset_init_hw(struct drm_i915_private *i915);