Merge branches 'clk-range', 'clk-uniphier', 'clk-apple' and 'clk-qcom' into clk-next

[linux-2.6-microblaze.git] / drivers / gpu / drm / bridge / nwl-dsi.c

diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index ed8ac50..af07eeb 100644 (file)
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/bitfield.h>
+#include <linux/bits.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/math64.h>
@@ -196,12 +197,9 @@ static u32 ps2bc(struct nwl_dsi *dsi, unsigned long long ps)
 /*
  * ui2bc - UI time periods to byte clock cycles
  */
-static u32 ui2bc(struct nwl_dsi *dsi, unsigned long long ui)
+static u32 ui2bc(unsigned int ui)
 {
-       u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
-
-       return DIV64_U64_ROUND_UP(ui * dsi->lanes,
-                                 dsi->mode.clock * 1000 * bpp);
+       return DIV_ROUND_UP(ui, BITS_PER_BYTE);
 }
 
 /*
@@ -232,12 +230,12 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi)
        }
 
        /* values in byte clock cycles */
-       cycles = ui2bc(dsi, cfg->clk_pre);
+       cycles = ui2bc(cfg->clk_pre);
        DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_pre: 0x%x\n", cycles);
        nwl_dsi_write(dsi, NWL_DSI_CFG_T_PRE, cycles);
        cycles = ps2bc(dsi, cfg->lpx + cfg->clk_prepare + cfg->clk_zero);
        DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap (pre): 0x%x\n", cycles);
-       cycles += ui2bc(dsi, cfg->clk_pre);
+       cycles += ui2bc(cfg->clk_pre);
        DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_post: 0x%x\n", cycles);
        nwl_dsi_write(dsi, NWL_DSI_CFG_T_POST, cycles);
        cycles = ps2bc(dsi, cfg->hs_exit);
@@ -939,6 +937,40 @@ static void nwl_dsi_bridge_detach(struct drm_bridge *bridge)
        drm_of_panel_bridge_remove(dsi->dev->of_node, 1, 0);
 }
 
+static u32 *nwl_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
+                                                struct drm_bridge_state *bridge_state,
+                                                struct drm_crtc_state *crtc_state,
+                                                struct drm_connector_state *conn_state,
+                                                u32 output_fmt,
+                                                unsigned int *num_input_fmts)
+{
+       u32 *input_fmts, input_fmt;
+
+       *num_input_fmts = 0;
+
+       switch (output_fmt) {
+       /* If MEDIA_BUS_FMT_FIXED is tested, return default bus format */
+       case MEDIA_BUS_FMT_FIXED:
+               input_fmt = MEDIA_BUS_FMT_RGB888_1X24;
+               break;
+       case MEDIA_BUS_FMT_RGB888_1X24:
+       case MEDIA_BUS_FMT_RGB666_1X18:
+       case MEDIA_BUS_FMT_RGB565_1X16:
+               input_fmt = output_fmt;
+               break;
+       default:
+               return NULL;
+       }
+
+       input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);
+       if (!input_fmts)
+               return NULL;
+       input_fmts[0] = input_fmt;
+       *num_input_fmts = 1;
+
+       return input_fmts;
+}
+
 static const struct drm_bridge_funcs nwl_dsi_bridge_funcs = {
        .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
        .atomic_destroy_state   = drm_atomic_helper_bridge_destroy_state,
@@ -946,6 +978,7 @@ static const struct drm_bridge_funcs nwl_dsi_bridge_funcs = {
        .atomic_check           = nwl_dsi_bridge_atomic_check,
        .atomic_enable          = nwl_dsi_bridge_atomic_enable,
        .atomic_disable         = nwl_dsi_bridge_atomic_disable,
+       .atomic_get_input_bus_fmts = nwl_bridge_atomic_get_input_bus_fmts,
        .mode_set               = nwl_dsi_bridge_mode_set,
        .mode_valid             = nwl_dsi_bridge_mode_valid,
        .attach                 = nwl_dsi_bridge_attach,