amdgpu/pm: Prevent force of DCEFCLK on NAVI10 and SIENNA_CICHLID

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / pm / swsmu / smu11 / navi10_ppt.c

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index f827096..ac13042 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1443,7 +1443,6 @@ static int navi10_force_clk_levels(struct smu_context *smu,
        case SMU_SOCCLK:
        case SMU_MCLK:
        case SMU_UCLK:
-       case SMU_DCEFCLK:
        case SMU_FCLK:
                /* There is only 2 levels for fine grained DPM */
                if (navi10_is_support_fine_grained_dpm(smu, clk_type)) {
@@ -1463,6 +1462,10 @@ static int navi10_force_clk_levels(struct smu_context *smu,
                if (ret)
                        return size;
                break;
+       case SMU_DCEFCLK:
+               dev_info(smu->adev->dev,"Setting DCEFCLK min/max dpm level is not supported!\n");
+               break;
+
        default:
                break;
        }