amdgpu/pm: Prevent force of DCEFCLK on NAVI10 and SIENNA_CICHLID

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / pm / swsmu / smu11 / navi10_ppt.c

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 1546271..ac13042 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -431,6 +431,30 @@ static int navi10_store_powerplay_table(struct smu_context *smu)
        return 0;
 }
 
+static int navi10_set_mp1_state(struct smu_context *smu,
+                               enum pp_mp1_state mp1_state)
+{
+       struct amdgpu_device *adev = smu->adev;
+       uint32_t mp1_fw_flags;
+       int ret = 0;
+
+       ret = smu_cmn_set_mp1_state(smu, mp1_state);
+       if (ret)
+               return ret;
+
+       if (mp1_state == PP_MP1_STATE_UNLOAD) {
+               mp1_fw_flags = RREG32_PCIE(MP1_Public |
+                                          (smnMP1_FIRMWARE_FLAGS & 0xffffffff));
+
+               mp1_fw_flags &= ~MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK;
+
+               WREG32_PCIE(MP1_Public |
+                           (smnMP1_FIRMWARE_FLAGS & 0xffffffff), mp1_fw_flags);
+       }
+
+       return 0;
+}
+
 static int navi10_setup_pptable(struct smu_context *smu)
 {
        int ret = 0;
@@ -481,7 +505,7 @@ static int navi10_tables_init(struct smu_context *smu)
                goto err0_out;
        smu_table->metrics_time = 0;
 
-       smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_0);
+       smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_1);
        smu_table->gpu_metrics_table = kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL);
        if (!smu_table->gpu_metrics_table)
                goto err1_out;
@@ -1419,7 +1443,6 @@ static int navi10_force_clk_levels(struct smu_context *smu,
        case SMU_SOCCLK:
        case SMU_MCLK:
        case SMU_UCLK:
-       case SMU_DCEFCLK:
        case SMU_FCLK:
                /* There is only 2 levels for fine grained DPM */
                if (navi10_is_support_fine_grained_dpm(smu, clk_type)) {
@@ -1439,6 +1462,10 @@ static int navi10_force_clk_levels(struct smu_context *smu,
                if (ret)
                        return size;
                break;
+       case SMU_DCEFCLK:
+               dev_info(smu->adev->dev,"Setting DCEFCLK min/max dpm level is not supported!\n");
+               break;
+
        default:
                break;
        }
@@ -2111,7 +2138,7 @@ static int navi10_get_power_limit(struct smu_context *smu)
                power_limit =
                        pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0];
        }
-       smu->current_power_limit = power_limit;
+       smu->current_power_limit = smu->default_power_limit = power_limit;
 
        if (smu->od_enabled &&
            navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_POWER_LIMIT)) {
@@ -2600,8 +2627,8 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
                                             void **table)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
-       struct gpu_metrics_v1_0 *gpu_metrics =
-               (struct gpu_metrics_v1_0 *)smu_table->gpu_metrics_table;
+       struct gpu_metrics_v1_1 *gpu_metrics =
+               (struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
        SmuMetrics_legacy_t metrics;
        int ret = 0;
 
@@ -2619,7 +2646,7 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
 
        mutex_unlock(&smu->metrics_lock);
 
-       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 0);
+       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
 
        gpu_metrics->temperature_edge = metrics.TemperatureEdge;
        gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2656,15 +2683,15 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
 
        *table = (void *)gpu_metrics;
 
-       return sizeof(struct gpu_metrics_v1_0);
+       return sizeof(struct gpu_metrics_v1_1);
 }
 
 static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
                                      void **table)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
-       struct gpu_metrics_v1_0 *gpu_metrics =
-               (struct gpu_metrics_v1_0 *)smu_table->gpu_metrics_table;
+       struct gpu_metrics_v1_1 *gpu_metrics =
+               (struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
        SmuMetrics_t metrics;
        int ret = 0;
 
@@ -2682,7 +2709,7 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
 
        mutex_unlock(&smu->metrics_lock);
 
-       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 0);
+       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
 
        gpu_metrics->temperature_edge = metrics.TemperatureEdge;
        gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2721,15 +2748,15 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
 
        *table = (void *)gpu_metrics;
 
-       return sizeof(struct gpu_metrics_v1_0);
+       return sizeof(struct gpu_metrics_v1_1);
 }
 
 static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
                                             void **table)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
-       struct gpu_metrics_v1_0 *gpu_metrics =
-               (struct gpu_metrics_v1_0 *)smu_table->gpu_metrics_table;
+       struct gpu_metrics_v1_1 *gpu_metrics =
+               (struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
        SmuMetrics_NV12_legacy_t metrics;
        int ret = 0;
 
@@ -2747,7 +2774,7 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
 
        mutex_unlock(&smu->metrics_lock);
 
-       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 0);
+       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
 
        gpu_metrics->temperature_edge = metrics.TemperatureEdge;
        gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2789,15 +2816,15 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
 
        *table = (void *)gpu_metrics;
 
-       return sizeof(struct gpu_metrics_v1_0);
+       return sizeof(struct gpu_metrics_v1_1);
 }
 
 static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
                                      void **table)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
-       struct gpu_metrics_v1_0 *gpu_metrics =
-               (struct gpu_metrics_v1_0 *)smu_table->gpu_metrics_table;
+       struct gpu_metrics_v1_1 *gpu_metrics =
+               (struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
        SmuMetrics_NV12_t metrics;
        int ret = 0;
 
@@ -2815,7 +2842,7 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
 
        mutex_unlock(&smu->metrics_lock);
 
-       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 0);
+       smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
 
        gpu_metrics->temperature_edge = metrics.TemperatureEdge;
        gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2859,7 +2886,7 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
 
        *table = (void *)gpu_metrics;
 
-       return sizeof(struct gpu_metrics_v1_0);
+       return sizeof(struct gpu_metrics_v1_1);
 }
 
 static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
@@ -3031,6 +3058,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .get_fan_parameters = navi10_get_fan_parameters,
        .post_init = navi10_post_smu_init,
        .interrupt_work = smu_v11_0_interrupt_work,
+       .set_mp1_state = navi10_set_mp1_state,
 };
 
 void navi10_set_ppt_funcs(struct smu_context *smu)