drm/amd/display: adjust MALL size available for DCN32 and DCN321

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / dml / dcn321 / dcn321_fpu.c

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
index 0ea4061..b80cef7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
@@ -534,8 +534,11 @@ void dcn321_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_p
                }
 
                /* Override from VBIOS for num_chan */
-               if (dc->ctx->dc_bios->vram_info.num_chans)
+               if (dc->ctx->dc_bios->vram_info.num_chans) {
                        dcn3_21_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans;
+                       dcn3_21_soc.mall_allocated_for_dcn_mbytes = (double)(dcn32_calc_num_avail_chans_for_mall(dc,
+                               dc->ctx->dc_bios->vram_info.num_chans) * dc->caps.mall_size_per_mem_channel);
+               }
 
                if (dc->ctx->dc_bios->vram_info.dram_channel_width_bytes)
                        dcn3_21_soc.dram_channel_width_bytes = dc->ctx->dc_bios->vram_info.dram_channel_width_bytes;