drm/amd/display: Enforce minimum prefetch time for low memclk on DCN32
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / dml / dcn321 / dcn321_fpu.c
index ec0486e..432b4ec 100644 (file)
@@ -544,6 +544,8 @@ void dcn321_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_p
        /* DML DSC delay factor workaround */
        dcn3_21_ip.dsc_delay_factor_wa = dc->debug.dsc_delay_factor_wa_x1000 / 1000.0;
 
+       dcn3_21_ip.min_prefetch_in_strobe_us = dc->debug.min_prefetch_in_strobe_ns / 1000.0;
+
        /* Override dispclk_dppclk_vco_speed_mhz from Clk Mgr */
        dcn3_21_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;
        dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0;