drm/amd/display: Multi-display underflow observed

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / core / dc.c

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 166dbaa..58eb0d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -70,6 +70,8 @@
 
 #include "dce/dmub_hw_lock_mgr.h"
 
+#include "dc_trace.h"
+
 #define CTX \
        dc->ctx
 
@@ -147,6 +149,20 @@ static void destroy_links(struct dc *dc)
        }
 }
 
+static uint32_t get_num_of_internal_disp(struct dc_link **links, uint32_t num_links)
+{
+       int i;
+       uint32_t count = 0;
+
+       for (i = 0; i < num_links; i++) {
+               if (links[i]->connector_signal == SIGNAL_TYPE_EDP ||
+                               links[i]->is_internal_display)
+                       count++;
+       }
+
+       return count;
+}
+
 static bool create_links(
                struct dc *dc,
                uint32_t num_virtual_links)
@@ -248,6 +264,8 @@ static bool create_links(
                virtual_link_encoder_construct(link->link_enc, &enc_init);
        }
 
+       dc->caps.num_of_internal_disp = get_num_of_internal_disp(dc->links, dc->link_count);
+
        return true;
 
 failed_alloc:
@@ -344,7 +362,7 @@ bool dc_stream_get_crtc_position(struct dc *dc,
  * calculate the crc.
  */
 bool dc_stream_configure_crc(struct dc *dc, struct dc_stream_state *stream,
-                            bool enable, bool continuous)
+                            struct crc_params *crc_window, bool enable, bool continuous)
 {
        int i;
        struct pipe_ctx *pipe;
@@ -360,7 +378,7 @@ bool dc_stream_configure_crc(struct dc *dc, struct dc_stream_state *stream,
        if (i == MAX_PIPES)
                return false;
 
-       /* Always capture the full frame */
+       /* By default, capture the full frame */
        param.windowa_x_start = 0;
        param.windowa_y_start = 0;
        param.windowa_x_end = pipe->stream->timing.h_addressable;
@@ -370,6 +388,17 @@ bool dc_stream_configure_crc(struct dc *dc, struct dc_stream_state *stream,
        param.windowb_x_end = pipe->stream->timing.h_addressable;
        param.windowb_y_end = pipe->stream->timing.v_addressable;
 
+       if (crc_window) {
+               param.windowa_x_start = crc_window->windowa_x_start;
+               param.windowa_y_start = crc_window->windowa_y_start;
+               param.windowa_x_end = crc_window->windowa_x_end;
+               param.windowa_y_end = crc_window->windowa_y_end;
+               param.windowb_x_start = crc_window->windowb_x_start;
+               param.windowb_y_start = crc_window->windowb_y_start;
+               param.windowb_x_end = crc_window->windowb_x_end;
+               param.windowb_y_end = crc_window->windowb_y_end;
+       }
+
        param.dsc_mode = pipe->stream->timing.flags.DSC ? 1:0;
        param.odm_mode = pipe->next_odm_pipe ? 1:0;
 
@@ -731,7 +760,7 @@ static bool dc_construct(struct dc *dc,
        dc->clk_mgr = dc_clk_mgr_create(dc->ctx, dc->res_pool->pp_smu, dc->res_pool->dccg);
        if (!dc->clk_mgr)
                goto fail;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_0
+#ifdef CONFIG_DRM_AMD_DC_DCN
        dc->clk_mgr->force_smu_not_present = init_params->force_smu_not_present;
 #endif
 
@@ -859,12 +888,16 @@ static void disable_vbios_mode_if_required(
                if (stream == NULL)
                        continue;
 
+               // only looking for first odm pipe
+               if (pipe->prev_odm_pipe)
+                       continue;
+
                if (stream->link->local_sink &&
                        stream->link->local_sink->sink_signal == SIGNAL_TYPE_EDP) {
                        link = stream->link;
                }
 
-               if (link != NULL) {
+               if (link != NULL && link->link_enc->funcs->is_dig_enabled(link->link_enc)) {
                        unsigned int enc_inst, tg_inst = 0;
                        unsigned int pix_clk_100hz;
 
@@ -1326,7 +1359,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
        int i, k, l;
        struct dc_stream_state *dc_streams[MAX_STREAMS] = {0};
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#if defined(CONFIG_DRM_AMD_DC_DCN)
        dc_allow_idle_optimizations(dc, false);
 #endif
 
@@ -1433,6 +1466,11 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
                dc->hwss.optimize_bandwidth(dc, context);
        }
 
+       if (dc->ctx->dce_version >= DCE_VERSION_MAX)
+               TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);
+       else
+               TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
+
        context->stream_mask = get_stream_mask(dc, context);
 
        if (context->stream_mask != dc->current_state->stream_mask)
@@ -1472,7 +1510,7 @@ bool dc_commit_state(struct dc *dc, struct dc_state *context)
        return (result == DC_OK);
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#if defined(CONFIG_DRM_AMD_DC_DCN)
 bool dc_acquire_release_mpc_3dlut(
                struct dc *dc, bool acquire,
                struct dc_stream_state *stream,
@@ -1568,8 +1606,8 @@ static void init_state(struct dc *dc, struct dc_state *context)
 
 struct dc_state *dc_create_state(struct dc *dc)
 {
-       struct dc_state *context = kzalloc(sizeof(struct dc_state),
-                                          GFP_KERNEL);
+       struct dc_state *context = kvzalloc(sizeof(struct dc_state),
+                                           GFP_KERNEL);
 
        if (!context)
                return NULL;
@@ -1926,7 +1964,7 @@ static enum surface_update_type check_update_surfaces_for_stream(
        int i;
        enum surface_update_type overall_type = UPDATE_TYPE_FAST;
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#if defined(CONFIG_DRM_AMD_DC_DCN)
        if (dc->idle_optimizations_allowed)
                overall_type = UPDATE_TYPE_FULL;
 
@@ -2400,7 +2438,7 @@ static void commit_planes_for_stream(struct dc *dc,
        }
 
        if (update_type == UPDATE_TYPE_FULL) {
-#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#if defined(CONFIG_DRM_AMD_DC_DCN)
                dc_allow_idle_optimizations(dc, false);
 
 #endif
@@ -2709,6 +2747,8 @@ void dc_commit_updates_for_stream(struct dc *dc,
                }
        }
 
+       TRACE_DC_PIPE_STATE(pipe_ctx, i, MAX_PIPES);
+
        commit_planes_for_stream(
                                dc,
                                srf_updates,
@@ -2733,9 +2773,15 @@ void dc_commit_updates_for_stream(struct dc *dc,
                }
        }
        /*let's use current_state to update watermark etc*/
-       if (update_type >= UPDATE_TYPE_FULL)
+       if (update_type >= UPDATE_TYPE_FULL) {
                dc_post_update_surfaces_to_stream(dc);
 
+               if (dc_ctx->dce_version >= DCE_VERSION_MAX)
+                       TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);
+               else
+                       TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
+       }
+
        return;
 
 }
@@ -2752,6 +2798,19 @@ struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i)
        return NULL;
 }
 
+struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link)
+{
+       uint8_t i;
+       struct dc_context *ctx = link->ctx;
+
+       for (i = 0; i < ctx->dc->current_state->stream_count; i++) {
+               if (ctx->dc->current_state->streams[i]->link == link)
+                       return ctx->dc->current_state->streams[i];
+       }
+
+       return NULL;
+}
+
 enum dc_irq_source dc_interrupt_to_irq_source(
                struct dc *dc,
                uint32_t src_id,
@@ -3028,16 +3087,16 @@ bool dc_set_psr_allow_active(struct dc *dc, bool enable)
 
                if (link->psr_settings.psr_feature_enabled) {
                        if (enable && !link->psr_settings.psr_allow_active)
-                               return dc_link_set_psr_allow_active(link, true, false);
+                               return dc_link_set_psr_allow_active(link, true, false, false);
                        else if (!enable && link->psr_settings.psr_allow_active)
-                               return dc_link_set_psr_allow_active(link, false, true);
+                               return dc_link_set_psr_allow_active(link, false, true, false);
                }
        }
 
        return true;
 }
 
-#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+#if defined(CONFIG_DRM_AMD_DC_DCN)
 
 void dc_allow_idle_optimizations(struct dc *dc, bool allow)
 {