Merge tag 'amd-drm-fixes-6.9-2024-03-21' of https://gitlab.freedesktop.org/agd5f...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm.c

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1c9c609..2851719 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1767,6 +1767,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
        if (amdgpu_dc_debug_mask & DC_FORCE_SUBVP_MCLK_SWITCH)
                adev->dm.dc->debug.force_subvp_mclk_switch = true;
 
+       if (amdgpu_dc_debug_mask & DC_ENABLE_DML2)
+               adev->dm.dc->debug.using_dml2 = true;
+
        adev->dm.dc->debug.visual_confirm = amdgpu_dc_visual_confirm;
 
        /* TODO: Remove after DP2 receiver gets proper support of Cable ID feature */
@@ -11271,18 +11274,24 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
        if (!adev->dm.freesync_module)
                goto update;
 
-       if (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT
-               || sink->sink_signal == SIGNAL_TYPE_EDP) {
+       if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
+                    sink->sink_signal == SIGNAL_TYPE_EDP)) {
                bool edid_check_required = false;
 
-               if (edid) {
-                       edid_check_required = is_dp_capable_without_timing_msa(
-                                               adev->dm.dc,
-                                               amdgpu_dm_connector);
+               if (is_dp_capable_without_timing_msa(adev->dm.dc,
+                                                    amdgpu_dm_connector)) {
+                       if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) {
+                               freesync_capable = true;
+                               amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;
+                               amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;
+                       } else {
+                               edid_check_required = edid->version > 1 ||
+                                                     (edid->version == 1 &&
+                                                      edid->revision > 1);
+                       }
                }
 
-               if (edid_check_required == true && (edid->version > 1 ||
-                  (edid->version == 1 && edid->revision > 1))) {
+               if (edid_check_required) {
                        for (i = 0; i < 4; i++) {
 
                                timing  = &edid->detailed_timings[i];