Merge tag 'fuse-update-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mszered...
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdkfd / kfd_device.c
index 4bfedaa..50922ff 100644 (file)
@@ -29,6 +29,7 @@
 #include "cwsr_trap_handler.h"
 #include "kfd_iommu.h"
 #include "amdgpu_amdkfd.h"
+#include "kfd_smi_events.h"
 
 #define MQD_SIZE_ALIGNED 768
 
@@ -75,6 +76,8 @@ static const struct kfd2kgd_calls *kfd2kgd_funcs[] = {
        [CHIP_NAVI14] = &gfx_v10_kfd2kgd,
        [CHIP_SIENNA_CICHLID] = &gfx_v10_3_kfd2kgd,
        [CHIP_NAVY_FLOUNDER] = &gfx_v10_3_kfd2kgd,
+       [CHIP_VANGOGH] = &gfx_v10_3_kfd2kgd,
+       [CHIP_DIMGREY_CAVEFISH] = &gfx_v10_3_kfd2kgd,
 };
 
 #ifdef KFD_SUPPORT_IOMMU_V2
@@ -115,6 +118,7 @@ static const struct kfd_device_info carrizo_device_info = {
        .num_xgmi_sdma_engines = 0,
        .num_sdma_queues_per_engine = 2,
 };
+#endif
 
 static const struct kfd_device_info raven_device_info = {
        .asic_family = CHIP_RAVEN,
@@ -133,7 +137,6 @@ static const struct kfd_device_info raven_device_info = {
        .num_xgmi_sdma_engines = 0,
        .num_sdma_queues_per_engine = 2,
 };
-#endif
 
 static const struct kfd_device_info hawaii_device_info = {
        .asic_family = CHIP_HAWAII,
@@ -497,13 +500,50 @@ static const struct kfd_device_info navy_flounder_device_info = {
        .num_sdma_queues_per_engine = 8,
 };
 
+static const struct kfd_device_info vangogh_device_info = {
+       .asic_family = CHIP_VANGOGH,
+       .asic_name = "vangogh",
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .doorbell_size  = 8,
+       .ih_ring_entry_size = 8 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_v9,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .needs_iommu_device = false,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+       .num_sdma_engines = 1,
+       .num_xgmi_sdma_engines = 0,
+       .num_sdma_queues_per_engine = 2,
+};
+
+static const struct kfd_device_info dimgrey_cavefish_device_info = {
+       .asic_family = CHIP_DIMGREY_CAVEFISH,
+       .asic_name = "dimgrey_cavefish",
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .doorbell_size  = 8,
+       .ih_ring_entry_size = 8 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_v9,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .needs_iommu_device = false,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+       .num_sdma_engines = 2,
+       .num_xgmi_sdma_engines = 0,
+       .num_sdma_queues_per_engine = 8,
+};
+
+
 /* For each entry, [0] is regular and [1] is virtualisation device. */
 static const struct kfd_device_info *kfd_supported_devices[][2] = {
 #ifdef KFD_SUPPORT_IOMMU_V2
        [CHIP_KAVERI] = {&kaveri_device_info, NULL},
        [CHIP_CARRIZO] = {&carrizo_device_info, NULL},
-       [CHIP_RAVEN] = {&raven_device_info, NULL},
 #endif
+       [CHIP_RAVEN] = {&raven_device_info, NULL},
        [CHIP_HAWAII] = {&hawaii_device_info, NULL},
        [CHIP_TONGA] = {&tonga_device_info, NULL},
        [CHIP_FIJI] = {&fiji_device_info, &fiji_vf_device_info},
@@ -521,6 +561,8 @@ static const struct kfd_device_info *kfd_supported_devices[][2] = {
        [CHIP_NAVI14] = {&navi14_device_info, NULL},
        [CHIP_SIENNA_CICHLID] = {&sienna_cichlid_device_info, &sienna_cichlid_device_info},
        [CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, &navy_flounder_device_info},
+       [CHIP_VANGOGH] = {&vangogh_device_info, NULL},
+       [CHIP_DIMGREY_CAVEFISH] = {&dimgrey_cavefish_device_info, &dimgrey_cavefish_device_info},
 };
 
 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
@@ -582,6 +624,8 @@ struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
 
        atomic_set(&kfd->sram_ecc_flag, 0);
 
+       ida_init(&kfd->doorbell_ida);
+
        return kfd;
 }
 
@@ -711,11 +755,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
                goto kfd_doorbell_error;
        }
 
-       if (kfd->kfd2kgd->get_hive_id)
-               kfd->hive_id = kfd->kfd2kgd->get_hive_id(kfd->kgd);
+       kfd->hive_id = amdgpu_amdkfd_get_hive_id(kfd->kgd);
 
-       if (kfd->kfd2kgd->get_unique_id)
-               kfd->unique_id = kfd->kfd2kgd->get_unique_id(kfd->kgd);
+       kfd->noretry = amdgpu_amdkfd_get_noretry(kfd->kgd);
 
        if (kfd_interrupt_init(kfd)) {
                dev_err(kfd_device, "Error initializing interrupts\n");
@@ -737,6 +779,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
                goto gws_error;
        }
 
+       /* If CRAT is broken, won't set iommu enabled */
+       kfd_double_confirm_iommu_support(kfd);
+
        if (kfd_iommu_device_init(kfd)) {
                dev_err(kfd_device, "Error initializing iommuv2\n");
                goto device_iommu_error;
@@ -796,6 +841,7 @@ void kgd2kfd_device_exit(struct kfd_dev *kfd)
                kfd_interrupt_exit(kfd);
                kfd_topology_remove_device(kfd);
                kfd_doorbell_fini(kfd);
+               ida_destroy(&kfd->doorbell_ida);
                kfd_gtt_sa_fini(kfd);
                amdgpu_amdkfd_free_gtt_mem(kfd->kgd, kfd->gtt_mem);
                if (kfd->gws)
@@ -810,6 +856,8 @@ int kgd2kfd_pre_reset(struct kfd_dev *kfd)
        if (!kfd->init_complete)
                return 0;
 
+       kfd_smi_event_update_gpu_reset(kfd, false);
+
        kfd->dqm->ops.pre_reset(kfd->dqm);
 
        kgd2kfd_suspend(kfd, false);
@@ -838,6 +886,8 @@ int kgd2kfd_post_reset(struct kfd_dev *kfd)
 
        atomic_set(&kfd->sram_ecc_flag, 0);
 
+       kfd_smi_event_update_gpu_reset(kfd, true);
+
        return 0;
 }
 
@@ -1245,6 +1295,12 @@ void kfd_dec_compute_active(struct kfd_dev *kfd)
        WARN_ONCE(count < 0, "Compute profile ref. count error");
 }
 
+void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask)
+{
+       if (kfd)
+               kfd_smi_event_update_thermal_throttling(kfd, throttle_bitmask);
+}
+
 #if defined(CONFIG_DEBUG_FS)
 
 /* This function will send a package to HIQ to hang the HWS