Merge tag 'modules-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/jeyu...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / uvd_v6_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 7a5b402..d4f4a66 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -175,11 +175,8 @@ static int uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring)
        int r;
 
        r = amdgpu_ring_alloc(ring, 16);
-       if (r) {
-               DRM_ERROR("amdgpu: uvd enc failed to lock ring %d (%d).\n",
-                         ring->idx, r);
+       if (r)
                return r;
-       }
        amdgpu_ring_write(ring, HEVC_ENC_CMD_END);
        amdgpu_ring_commit(ring);
 
@@ -189,14 +186,8 @@ static int uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring)
                DRM_UDELAY(1);
        }
 
-       if (i < adev->usec_timeout) {
-               DRM_DEBUG("ring test on %d succeeded in %d usecs\n",
-                        ring->idx, i);
-       } else {
-               DRM_ERROR("amdgpu: ring %d test failed\n",
-                         ring->idx);
+       if (i >= adev->usec_timeout)
                r = -ETIMEDOUT;
-       }
 
        return r;
 }
@@ -336,31 +327,24 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
        long r;
 
        r = uvd_v6_0_enc_get_create_msg(ring, 1, NULL);
-       if (r) {
-               DRM_ERROR("amdgpu: failed to get create msg (%ld).\n", r);
+       if (r)
                goto error;
-       }
 
        r = uvd_v6_0_enc_get_destroy_msg(ring, 1, &fence);
-       if (r) {
-               DRM_ERROR("amdgpu: failed to get destroy ib (%ld).\n", r);
+       if (r)
                goto error;
-       }
 
        r = dma_fence_wait_timeout(fence, false, timeout);
-       if (r == 0) {
-               DRM_ERROR("amdgpu: IB test timed out.\n");
+       if (r == 0)
                r = -ETIMEDOUT;
-       } else if (r < 0) {
-               DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
-       } else {
-               DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);
+       else if (r > 0)
                r = 0;
-       }
+
 error:
        dma_fence_put(fence);
        return r;
 }
+
 static int uvd_v6_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -416,16 +400,16 @@ static int uvd_v6_0_sw_init(void *handle)
                DRM_INFO("UVD ENC is disabled\n");
        }
 
-       r = amdgpu_uvd_resume(adev);
-       if (r)
-               return r;
-
        ring = &adev->uvd.inst->ring;
        sprintf(ring->name, "uvd");
        r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst->irq, 0);
        if (r)
                return r;
 
+       r = amdgpu_uvd_resume(adev);
+       if (r)
+               return r;
+
        if (uvd_v6_0_enc_support(adev)) {
                for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
                        ring = &adev->uvd.inst->ring_enc[i];
@@ -476,12 +460,9 @@ static int uvd_v6_0_hw_init(void *handle)
        uvd_v6_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);
        uvd_v6_0_enable_mgcg(adev, true);
 
-       ring->ready = true;
-       r = amdgpu_ring_test_ring(ring);
-       if (r) {
-               ring->ready = false;
+       r = amdgpu_ring_test_helper(ring);
+       if (r)
                goto done;
-       }
 
        r = amdgpu_ring_alloc(ring, 10);
        if (r) {
@@ -513,12 +494,9 @@ static int uvd_v6_0_hw_init(void *handle)
        if (uvd_v6_0_enc_support(adev)) {
                for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
                        ring = &adev->uvd.inst->ring_enc[i];
-                       ring->ready = true;
-                       r = amdgpu_ring_test_ring(ring);
-                       if (r) {
-                               ring->ready = false;
+                       r = amdgpu_ring_test_helper(ring);
+                       if (r)
                                goto done;
-                       }
                }
        }
 
@@ -548,7 +526,7 @@ static int uvd_v6_0_hw_fini(void *handle)
        if (RREG32(mmUVD_STATUS) != 0)
                uvd_v6_0_stop(adev);
 
-       ring->ready = false;
+       ring->sched.ready = false;
 
        return 0;
 }
@@ -969,11 +947,9 @@ static int uvd_v6_0_ring_test_ring(struct amdgpu_ring *ring)
 
        WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 3);
-       if (r) {
-               DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
-                         ring->idx, r);
+       if (r)
                return r;
-       }
+
        amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
        amdgpu_ring_write(ring, 0xDEADBEEF);
        amdgpu_ring_commit(ring);
@@ -984,14 +960,9 @@ static int uvd_v6_0_ring_test_ring(struct amdgpu_ring *ring)
                DRM_UDELAY(1);
        }
 
-       if (i < adev->usec_timeout) {
-               DRM_DEBUG("ring test on %d succeeded in %d usecs\n",
-                        ring->idx, i);
-       } else {
-               DRM_ERROR("amdgpu: ring %d test failed (0x%08X)\n",
-                         ring->idx, tmp);
-               r = -EINVAL;
-       }
+       if (i >= adev->usec_timeout)
+               r = -ETIMEDOUT;
+
        return r;
 }
 
@@ -1004,9 +975,12 @@ static int uvd_v6_0_ring_test_ring(struct amdgpu_ring *ring)
  * Write ring commands to execute the indirect buffer
  */
 static void uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
+                                 struct amdgpu_job *job,
                                  struct amdgpu_ib *ib,
-                                 unsigned vmid, bool ctx_switch)
+                                 bool ctx_switch)
 {
+       unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+
        amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_VMID, 0));
        amdgpu_ring_write(ring, vmid);
 
@@ -1027,8 +1001,12 @@ static void uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring,
  * Write enc ring commands to execute the indirect buffer
  */
 static void uvd_v6_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
-               struct amdgpu_ib *ib, unsigned int vmid, bool ctx_switch)
+                                       struct amdgpu_job *job,
+                                       struct amdgpu_ib *ib,
+                                       bool ctx_switch)
 {
+       unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+
        amdgpu_ring_write(ring, HEVC_ENC_CMD_IB_VM);
        amdgpu_ring_write(ring, vmid);
        amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));