drm/amd/amdgpu: Enable arcturus devices to access the method kgd_gfx_v9_get_cu_occupa...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / dce_v11_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 01ce522..c62c56a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -346,7 +346,7 @@ static void dce_v11_0_hpd_set_polarity(struct amdgpu_device *adev,
  */
 static void dce_v11_0_hpd_init(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -400,7 +400,7 @@ static void dce_v11_0_hpd_init(struct amdgpu_device *adev)
  */
 static void dce_v11_0_hpd_fini(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -530,7 +530,7 @@ void dce_v11_0_disable_dce(struct amdgpu_device *adev)
 static void dce_v11_0_program_fmt(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
@@ -1235,7 +1235,7 @@ static struct amdgpu_audio_pin *dce_v11_0_audio_get_pin(struct amdgpu_device *ad
 
 static void dce_v11_0_afmt_audio_select_pin(struct drm_encoder *encoder)
 {
-       struct amdgpu_device *adev = encoder->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(encoder->dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        u32 tmp;
@@ -1252,7 +1252,7 @@ static void dce_v11_0_audio_write_latency_fields(struct drm_encoder *encoder,
                                                struct drm_display_mode *mode)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector;
@@ -1298,7 +1298,7 @@ static void dce_v11_0_audio_write_latency_fields(struct drm_encoder *encoder,
 static void dce_v11_0_audio_write_speaker_allocation(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector;
@@ -1354,7 +1354,7 @@ static void dce_v11_0_audio_write_speaker_allocation(struct drm_encoder *encoder
 static void dce_v11_0_audio_write_sad_regs(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector;
@@ -1525,7 +1525,7 @@ static void dce_v11_0_audio_fini(struct amdgpu_device *adev)
 static void dce_v11_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
@@ -1561,7 +1561,7 @@ static void dce_v11_0_afmt_update_avi_infoframe(struct drm_encoder *encoder,
                                               void *buffer, size_t size)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        uint8_t *frame = buffer + 3;
@@ -1580,7 +1580,7 @@ static void dce_v11_0_afmt_update_avi_infoframe(struct drm_encoder *encoder,
 static void dce_v11_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);
@@ -1611,7 +1611,7 @@ static void dce_v11_0_afmt_setmode(struct drm_encoder *encoder,
                                  struct drm_display_mode *mode)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
@@ -1791,7 +1791,7 @@ static void dce_v11_0_afmt_setmode(struct drm_encoder *encoder,
 static void dce_v11_0_afmt_enable(struct drm_encoder *encoder, bool enable)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
 
@@ -1864,7 +1864,7 @@ static void dce_v11_0_vga_enable(struct drm_crtc *crtc, bool enable)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u32 vga_control;
 
        vga_control = RREG32(vga_control_regs[amdgpu_crtc->crtc_id]) & ~1;
@@ -1878,7 +1878,7 @@ static void dce_v11_0_grph_enable(struct drm_crtc *crtc, bool enable)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
 
        if (enable)
                WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 1);
@@ -1892,7 +1892,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct drm_framebuffer *target_fb;
        struct drm_gem_object *obj;
        struct amdgpu_bo *abo;
@@ -2137,7 +2137,7 @@ static void dce_v11_0_set_interleave(struct drm_crtc *crtc,
                                     struct drm_display_mode *mode)
 {
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        u32 tmp;
 
@@ -2153,7 +2153,7 @@ static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u16 *r, *g, *b;
        int i;
        u32 tmp;
@@ -2235,22 +2235,18 @@ static int dce_v11_0_pick_dig_encoder(struct drm_encoder *encoder)
                        return 1;
                else
                        return 0;
-               break;
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
                if (dig->linkb)
                        return 3;
                else
                        return 2;
-               break;
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
                if (dig->linkb)
                        return 5;
                else
                        return 4;
-               break;
        case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
                return 6;
-               break;
        default:
                DRM_ERROR("invalid encoder_id: 0x%x\n", amdgpu_encoder->encoder_id);
                return 0;
@@ -2283,7 +2279,7 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u32 pll_in_use;
        int pll;
 
@@ -2304,19 +2300,16 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
                                return ATOM_COMBOPHY_PLL1;
                        else
                                return ATOM_COMBOPHY_PLL0;
-                       break;
                case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
                        if (dig->linkb)
                                return ATOM_COMBOPHY_PLL3;
                        else
                                return ATOM_COMBOPHY_PLL2;
-                       break;
                case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
                        if (dig->linkb)
                                return ATOM_COMBOPHY_PLL5;
                        else
                                return ATOM_COMBOPHY_PLL4;
-                       break;
                default:
                        DRM_ERROR("invalid encoder_id: 0x%x\n", amdgpu_encoder->encoder_id);
                        return ATOM_PPLL_INVALID;
@@ -2364,7 +2357,7 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
 
 static void dce_v11_0_lock_cursor(struct drm_crtc *crtc, bool lock)
 {
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        uint32_t cur_lock;
 
@@ -2379,7 +2372,7 @@ static void dce_v11_0_lock_cursor(struct drm_crtc *crtc, bool lock)
 static void dce_v11_0_hide_cursor(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        u32 tmp;
 
        tmp = RREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset);
@@ -2390,7 +2383,7 @@ static void dce_v11_0_hide_cursor(struct drm_crtc *crtc)
 static void dce_v11_0_show_cursor(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        u32 tmp;
 
        WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,
@@ -2408,7 +2401,7 @@ static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc,
                                        int x, int y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        int xorigin = 0, yorigin = 0;
 
        amdgpu_crtc->cursor_x = x;
@@ -2582,7 +2575,7 @@ static const struct drm_crtc_funcs dce_v11_0_crtc_funcs = {
 static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        unsigned type;
 
@@ -2636,7 +2629,7 @@ static void dce_v11_0_crtc_disable(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_atom_ss ss;
        int i;
 
@@ -2706,7 +2699,7 @@ static int dce_v11_0_crtc_mode_set(struct drm_crtc *crtc,
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
 
        if (!amdgpu_crtc->adjusted_clock)
                return -EINVAL;
@@ -2785,7 +2778,7 @@ static int dce_v11_0_crtc_set_base_atomic(struct drm_crtc *crtc,
                                         struct drm_framebuffer *fb,
                                         int x, int y, enum mode_set_atomic state)
 {
-       return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1);
+       return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1);
 }
 
 static const struct drm_crtc_helper_funcs dce_v11_0_crtc_helper_funcs = {
@@ -2809,7 +2802,7 @@ static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index)
        if (amdgpu_crtc == NULL)
                return -ENOMEM;
 
-       drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v11_0_crtc_funcs);
+       drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v11_0_crtc_funcs);
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
@@ -2817,8 +2810,8 @@ static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index)
 
        amdgpu_crtc->max_cursor_width = 128;
        amdgpu_crtc->max_cursor_height = 128;
-       adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
-       adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
+       adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
+       adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
        switch (amdgpu_crtc->crtc_id) {
        case 0:
@@ -2913,24 +2906,24 @@ static int dce_v11_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
+       adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
 
-       adev->ddev->mode_config.async_page_flip = true;
+       adev_to_drm(adev)->mode_config.async_page_flip = true;
 
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
 
-       adev->ddev->mode_config.preferred_depth = 24;
-       adev->ddev->mode_config.prefer_shadow = 1;
+       adev_to_drm(adev)->mode_config.preferred_depth = 24;
+       adev_to_drm(adev)->mode_config.prefer_shadow = 1;
 
-       adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
+       adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
        r = amdgpu_display_modeset_create_props(adev);
        if (r)
                return r;
 
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
 
 
        /* allocate crtcs */
@@ -2941,7 +2934,7 @@ static int dce_v11_0_sw_init(void *handle)
        }
 
        if (amdgpu_atombios_get_connector_info_from_object_table(adev))
-               amdgpu_display_print_display_setup(adev->ddev);
+               amdgpu_display_print_display_setup(adev_to_drm(adev));
        else
                return -EINVAL;
 
@@ -2954,7 +2947,7 @@ static int dce_v11_0_sw_init(void *handle)
        if (r)
                return r;
 
-       drm_kms_helper_poll_init(adev->ddev);
+       drm_kms_helper_poll_init(adev_to_drm(adev));
 
        adev->mode_info.mode_config_initialized = true;
        return 0;
@@ -2966,13 +2959,13 @@ static int dce_v11_0_sw_fini(void *handle)
 
        kfree(adev->mode_info.bios_hardcoded_edid);
 
-       drm_kms_helper_poll_fini(adev->ddev);
+       drm_kms_helper_poll_fini(adev_to_drm(adev));
 
        dce_v11_0_audio_fini(adev);
 
        dce_v11_0_afmt_fini(adev);
 
-       drm_mode_config_cleanup(adev->ddev);
+       drm_mode_config_cleanup(adev_to_drm(adev));
        adev->mode_info.mode_config_initialized = false;
 
        return 0;
@@ -3283,14 +3276,14 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
        if(amdgpu_crtc == NULL)
                return 0;
 
-       spin_lock_irqsave(&adev->ddev->event_lock, flags);
+       spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
        works = amdgpu_crtc->pflip_works;
        if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED){
                DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != "
                                                 "AMDGPU_FLIP_SUBMITTED(%d)\n",
                                                 amdgpu_crtc->pflip_status,
                                                 AMDGPU_FLIP_SUBMITTED);
-               spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+               spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
                return 0;
        }
 
@@ -3302,7 +3295,7 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
        if(works->event)
                drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
 
-       spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+       spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
 
        drm_crtc_vblank_put(&amdgpu_crtc->base);
        schedule_work(&works->unpin_work);
@@ -3372,7 +3365,7 @@ static int dce_v11_0_crtc_irq(struct amdgpu_device *adev,
                        DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
 
                if (amdgpu_irq_enabled(adev, source, irq_type)) {
-                       drm_handle_vblank(adev->ddev, crtc);
+                       drm_handle_vblank(adev_to_drm(adev), crtc);
                }
                DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
 
@@ -3471,7 +3464,7 @@ dce_v11_0_encoder_mode_set(struct drm_encoder *encoder,
 
 static void dce_v11_0_encoder_prepare(struct drm_encoder *encoder)
 {
-       struct amdgpu_device *adev = encoder->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(encoder->dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
 
@@ -3511,7 +3504,7 @@ static void dce_v11_0_encoder_prepare(struct drm_encoder *encoder)
 static void dce_v11_0_encoder_commit(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
 
        /* need to call this here as we need the crtc set up */
        amdgpu_atombios_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
@@ -3611,7 +3604,7 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev,
                                 uint32_t supported_device,
                                 u16 caps)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_encoder *encoder;
        struct amdgpu_encoder *amdgpu_encoder;