drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / ci_dpm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 9b9be6b..573bc97 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -86,12 +86,14 @@ static const struct ci_pt_defaults defaults_bonaire_xt =
        { 0x17C, 0x172, 0x180, 0x1BC, 0x1B3, 0x1BD, 0x206, 0x200, 0x203, 0x25D, 0x25A, 0x255, 0x2C3, 0x2C5, 0x2B4 }
 };
 
+#if 0
 static const struct ci_pt_defaults defaults_bonaire_pro =
 {
        1, 0xF, 0xFD, 0x19, 5, 45, 0, 0x65062,
        { 0x8C,  0x23F, 0x244, 0xA6,  0x83,  0x85,  0x86,  0x86,  0x83,  0xDB,  0xDB,  0xDA,  0x67,  0x60,  0x5F  },
        { 0x187, 0x193, 0x193, 0x1C7, 0x1D1, 0x1D1, 0x210, 0x219, 0x219, 0x266, 0x26C, 0x26C, 0x2C9, 0x2CB, 0x2CB }
 };
+#endif
 
 static const struct ci_pt_defaults defaults_saturn_xt =
 {
@@ -738,19 +740,19 @@ static int ci_enable_didt(struct amdgpu_device *adev, bool enable)
 
        if (pi->caps_sq_ramping || pi->caps_db_ramping ||
            pi->caps_td_ramping || pi->caps_tcp_ramping) {
-               gfx_v7_0_enter_rlc_safe_mode(adev);
+               adev->gfx.rlc.funcs->enter_safe_mode(adev);
 
                if (enable) {
                        ret = ci_program_pt_config_registers(adev, didt_config_ci);
                        if (ret) {
-                               gfx_v7_0_exit_rlc_safe_mode(adev);
+                               adev->gfx.rlc.funcs->exit_safe_mode(adev);
                                return ret;
                        }
                }
 
                ci_do_enable_didt(adev, enable);
 
-               gfx_v7_0_exit_rlc_safe_mode(adev);
+               adev->gfx.rlc.funcs->exit_safe_mode(adev);
        }
 
        return 0;
@@ -6564,6 +6566,40 @@ static int ci_dpm_set_sclk_od(struct amdgpu_device *adev, uint32_t value)
        return 0;
 }
 
+static int ci_dpm_get_mclk_od(struct amdgpu_device *adev)
+{
+       struct ci_power_info *pi = ci_get_pi(adev);
+       struct ci_single_dpm_table *mclk_table = &(pi->dpm_table.mclk_table);
+       struct ci_single_dpm_table *golden_mclk_table =
+                       &(pi->golden_dpm_table.mclk_table);
+       int value;
+
+       value = (mclk_table->dpm_levels[mclk_table->count - 1].value -
+                       golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value) *
+                       100 /
+                       golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;
+
+       return value;
+}
+
+static int ci_dpm_set_mclk_od(struct amdgpu_device *adev, uint32_t value)
+{
+       struct ci_power_info *pi = ci_get_pi(adev);
+       struct ci_ps *ps = ci_get_ps(adev->pm.dpm.requested_ps);
+       struct ci_single_dpm_table *golden_mclk_table =
+                       &(pi->golden_dpm_table.mclk_table);
+
+       if (value > 20)
+               value = 20;
+
+       ps->performance_levels[ps->performance_level_count - 1].mclk =
+                       golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value *
+                       value / 100 +
+                       golden_mclk_table->dpm_levels[golden_mclk_table->count - 1].value;
+
+       return 0;
+}
+
 const struct amd_ip_funcs ci_dpm_ip_funcs = {
        .name = "ci_dpm",
        .early_init = ci_dpm_early_init,
@@ -6602,6 +6638,8 @@ static const struct amdgpu_dpm_funcs ci_dpm_funcs = {
        .force_clock_level = ci_dpm_force_clock_level,
        .get_sclk_od = ci_dpm_get_sclk_od,
        .set_sclk_od = ci_dpm_set_sclk_od,
+       .get_mclk_od = ci_dpm_get_mclk_od,
+       .set_mclk_od = ci_dpm_set_mclk_od,
 };
 
 static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev)