drm/amd/amdgpu: Enable arcturus devices to access the method kgd_gfx_v9_get_cu_occupa...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ucode.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 55fe19a..2b7c90b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -391,6 +391,8 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
        case CHIP_NAVI12:
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
+       case CHIP_VANGOGH:
+       case CHIP_DIMGREY_CAVEFISH:
                if (!load_type)
                        return AMDGPU_FW_LOAD_DIRECT;
                else
@@ -500,6 +502,8 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
             ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL &&
             ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM &&
             ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM &&
+            ucode->ucode_id != AMDGPU_UCODE_ID_RLC_IRAM &&
+            ucode->ucode_id != AMDGPU_UCODE_ID_RLC_DRAM &&
                 ucode->ucode_id != AMDGPU_UCODE_ID_DMCU_ERAM &&
                 ucode->ucode_id != AMDGPU_UCODE_ID_DMCU_INTV &&
                 ucode->ucode_id != AMDGPU_UCODE_ID_DMCUB)) {
@@ -556,6 +560,14 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
                ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes;
                memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm,
                       ucode->ucode_size);
+       } else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_IRAM) {
+               ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes;
+               memcpy(ucode->kaddr, adev->gfx.rlc.rlc_iram_ucode,
+                      ucode->ucode_size);
+       } else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_DRAM) {
+               ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes;
+               memcpy(ucode->kaddr, adev->gfx.rlc.rlc_dram_ucode,
+                      ucode->ucode_size);
        } else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MES) {
                ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);
                memcpy(ucode->kaddr, (void *)((uint8_t *)adev->mes.fw->data +
@@ -576,8 +588,8 @@ static int amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode,
 {
        const struct gfx_firmware_header_v1_0 *header = NULL;
        const struct common_firmware_header *comm_hdr = NULL;
-       uint8_t* src_addr = NULL;
-       uint8_t* dst_addr = NULL;
+       uint8_t *src_addr = NULL;
+       uint8_t *dst_addr = NULL;
 
        if (NULL == ucode->fw)
                return 0;