Merge tag 'amd-drm-next-5.15-2021-08-06' of https://gitlab.freedesktop.org/agd5f...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_psp.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 3030ec2..6b16455 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -48,11 +48,15 @@
 struct psp_context;
 struct psp_xgmi_node_info;
 struct psp_xgmi_topology_info;
+struct psp_bin_desc;
 
 enum psp_bootloader_cmd {
        PSP_BL__LOAD_SYSDRV             = 0x10000,
        PSP_BL__LOAD_SOSDRV             = 0x20000,
        PSP_BL__LOAD_KEY_DATABASE       = 0x80000,
+       PSP_BL__LOAD_SOCDRV             = 0xB0000,
+       PSP_BL__LOAD_INTFDRV            = 0xC0000,
+       PSP_BL__LOAD_DBGDRV             = 0xD0000,
        PSP_BL__DRAM_LONG_TRAIN         = 0x100000,
        PSP_BL__DRAM_SHORT_TRAIN        = 0x200000,
        PSP_BL__LOAD_TOS_SPL_TABLE      = 0x10000000,
@@ -93,6 +97,9 @@ struct psp_funcs
        int (*bootloader_load_kdb)(struct psp_context *psp);
        int (*bootloader_load_spl)(struct psp_context *psp);
        int (*bootloader_load_sysdrv)(struct psp_context *psp);
+       int (*bootloader_load_soc_drv)(struct psp_context *psp);
+       int (*bootloader_load_intf_drv)(struct psp_context *psp);
+       int (*bootloader_load_dbg_drv)(struct psp_context *psp);
        int (*bootloader_load_sos)(struct psp_context *psp);
        int (*ring_init)(struct psp_context *psp, enum psp_ring_type ring_type);
        int (*ring_create)(struct psp_context *psp,
@@ -106,7 +113,7 @@ struct psp_funcs
        int (*mem_training)(struct psp_context *psp, uint32_t ops);
        uint32_t (*ring_get_wptr)(struct psp_context *psp);
        void (*ring_set_wptr)(struct psp_context *psp, uint32_t value);
-       int (*load_usbc_pd_fw)(struct psp_context *psp, dma_addr_t dma_addr);
+       int (*load_usbc_pd_fw)(struct psp_context *psp, uint64_t fw_pri_mc_addr);
        int (*read_usbc_pd_fw)(struct psp_context *psp, uint32_t *fw_ver);
 };
 
@@ -116,6 +123,7 @@ struct psp_xgmi_node_info {
        uint8_t                                 num_hops;
        uint8_t                                 is_sharing_enabled;
        enum ta_xgmi_assigned_sdma_engine       sdma_engine;
+       uint8_t                                 num_links;
 };
 
 struct psp_xgmi_topology_info {
@@ -282,6 +290,13 @@ struct psp_runtime_boot_cfg_entry {
        uint32_t reserved;
 };
 
+struct psp_bin_desc {
+       uint32_t fw_version;
+       uint32_t feature_version;
+       uint32_t size_bytes;
+       uint8_t *start_addr;
+};
+
 struct psp_context
 {
        struct amdgpu_device            *adev;
@@ -297,20 +312,15 @@ struct psp_context
 
        /* sos firmware */
        const struct firmware           *sos_fw;
-       uint32_t                        sos_fw_version;
-       uint32_t                        sos_feature_version;
-       uint32_t                        sys_bin_size;
-       uint32_t                        sos_bin_size;
-       uint32_t                        toc_bin_size;
-       uint32_t                        kdb_bin_size;
-       uint32_t                        spl_bin_size;
-       uint32_t                        rl_bin_size;
-       uint8_t                         *sys_start_addr;
-       uint8_t                         *sos_start_addr;
-       uint8_t                         *toc_start_addr;
-       uint8_t                         *kdb_start_addr;
-       uint8_t                         *spl_start_addr;
-       uint8_t                         *rl_start_addr;
+       struct psp_bin_desc             sys;
+       struct psp_bin_desc             sos;
+       struct psp_bin_desc             toc;
+       struct psp_bin_desc             kdb;
+       struct psp_bin_desc             spl;
+       struct psp_bin_desc             rl;
+       struct psp_bin_desc             soc_drv;
+       struct psp_bin_desc             intf_drv;
+       struct psp_bin_desc             dbg_drv;
 
        /* tmr buffer */
        struct amdgpu_bo                *tmr_bo;
@@ -325,8 +335,6 @@ struct psp_context
 
        /* toc firmware */
        const struct firmware           *toc_fw;
-       uint32_t                        toc_fw_version;
-       uint32_t                        toc_feature_version;
 
        /* fence buffer */
        struct amdgpu_bo                *fence_buf_bo;
@@ -402,6 +410,12 @@ struct amdgpu_psp_funcs {
                ((psp)->funcs->bootloader_load_spl ? (psp)->funcs->bootloader_load_spl((psp)) : 0)
 #define psp_bootloader_load_sysdrv(psp) \
                ((psp)->funcs->bootloader_load_sysdrv ? (psp)->funcs->bootloader_load_sysdrv((psp)) : 0)
+#define psp_bootloader_load_soc_drv(psp) \
+               ((psp)->funcs->bootloader_load_soc_drv ? (psp)->funcs->bootloader_load_soc_drv((psp)) : 0)
+#define psp_bootloader_load_intf_drv(psp) \
+               ((psp)->funcs->bootloader_load_intf_drv ? (psp)->funcs->bootloader_load_intf_drv((psp)) : 0)
+#define psp_bootloader_load_dbg_drv(psp) \
+               ((psp)->funcs->bootloader_load_dbg_drv ? (psp)->funcs->bootloader_load_dbg_drv((psp)) : 0)
 #define psp_bootloader_load_sos(psp) \
                ((psp)->funcs->bootloader_load_sos ? (psp)->funcs->bootloader_load_sos((psp)) : 0)
 #define psp_smu_reload_quirk(psp) \
@@ -414,9 +428,9 @@ struct amdgpu_psp_funcs {
 #define psp_ring_get_wptr(psp) (psp)->funcs->ring_get_wptr((psp))
 #define psp_ring_set_wptr(psp, value) (psp)->funcs->ring_set_wptr((psp), (value))
 
-#define psp_load_usbc_pd_fw(psp, dma_addr) \
+#define psp_load_usbc_pd_fw(psp, fw_pri_mc_addr) \
        ((psp)->funcs->load_usbc_pd_fw ? \
-       (psp)->funcs->load_usbc_pd_fw((psp), (dma_addr)) : -EINVAL)
+       (psp)->funcs->load_usbc_pd_fw((psp), (fw_pri_mc_addr)) : -EINVAL)
 
 #define psp_read_usbc_pd_fw(psp, fw_ver) \
        ((psp)->funcs->read_usbc_pd_fw ? \
@@ -427,6 +441,7 @@ extern const struct amd_ip_funcs psp_ip_funcs;
 extern const struct amdgpu_ip_block_version psp_v3_1_ip_block;
 extern const struct amdgpu_ip_block_version psp_v10_0_ip_block;
 extern const struct amdgpu_ip_block_version psp_v11_0_ip_block;
+extern const struct amdgpu_ip_block_version psp_v11_0_8_ip_block;
 extern const struct amdgpu_ip_block_version psp_v12_0_ip_block;
 extern const struct amdgpu_ip_block_version psp_v13_0_ip_block;
 
@@ -483,4 +498,5 @@ int psp_load_fw_list(struct psp_context *psp,
                     struct amdgpu_firmware_info **ucode_list, int ucode_count);
 void psp_copy_fw(struct psp_context *psp, uint8_t *start_addr, uint32_t bin_size);
 
+int is_psp_fw_valid(struct psp_bin_desc bin);
 #endif