drm/amdgpu/pm: update comment to clarify Overdrive interfaces

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_pm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 17bc7f5..b3d3330 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -163,6 +163,9 @@ static ssize_t amdgpu_get_power_dpm_state(struct device *dev,
        enum amd_pm_state_type pm;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -196,6 +199,9 @@ static ssize_t amdgpu_set_power_dpm_state(struct device *dev,
        enum amd_pm_state_type  state;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (strncmp("battery", buf, strlen("battery")) == 0)
                state = POWER_STATE_TYPE_BATTERY;
        else if (strncmp("balanced", buf, strlen("balanced")) == 0)
@@ -297,6 +303,9 @@ static ssize_t amdgpu_get_power_dpm_force_performance_level(struct device *dev,
        enum amd_dpm_forced_level level = 0xff;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -334,6 +343,9 @@ static ssize_t amdgpu_set_power_dpm_force_performance_level(struct device *dev,
        enum amd_dpm_forced_level current_level = 0xff;
        int ret = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (strncmp("low", buf, strlen("low")) == 0) {
                level = AMD_DPM_FORCED_LEVEL_LOW;
        } else if (strncmp("high", buf, strlen("high")) == 0) {
@@ -371,6 +383,15 @@ static ssize_t amdgpu_set_power_dpm_force_performance_level(struct device *dev,
                return count;
        }
 
+       if (adev->asic_type == CHIP_RAVEN) {
+               if (!(adev->apu_flags & AMD_APU_IS_RAVEN2)) {
+                       if (current_level != AMD_DPM_FORCED_LEVEL_MANUAL && level == AMD_DPM_FORCED_LEVEL_MANUAL)
+                               amdgpu_gfx_off_ctrl(adev, false);
+                       else if (current_level == AMD_DPM_FORCED_LEVEL_MANUAL && level != AMD_DPM_FORCED_LEVEL_MANUAL)
+                               amdgpu_gfx_off_ctrl(adev, true);
+               }
+       }
+
        /* profile_exit setting is valid only when current mode is in profile mode */
        if (!(current_level & (AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
            AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
@@ -424,6 +445,9 @@ static ssize_t amdgpu_get_pp_num_states(struct device *dev,
        struct pp_states_info data;
        int i, buf_len, ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -463,6 +487,9 @@ static ssize_t amdgpu_get_pp_cur_state(struct device *dev,
        enum amd_pm_state_type pm = 0;
        int i = 0, ret = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -499,6 +526,9 @@ static ssize_t amdgpu_get_pp_force_state(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (adev->pp_force_state_enabled)
                return amdgpu_get_pp_cur_state(dev, attr, buf);
        else
@@ -516,6 +546,9 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,
        unsigned long idx;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (strlen(buf) == 1)
                adev->pp_force_state_enabled = false;
        else if (is_support_sw_smu(adev))
@@ -571,6 +604,9 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,
        char *table = NULL;
        int size, ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -610,6 +646,9 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
        struct amdgpu_device *adev = ddev->dev_private;
        int ret = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -657,7 +696,7 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
  * default power levels, write "r" (reset) to the file to reset them.
  *
  *
- * < For Vega20 >
+ * < For Vega20 and newer ASICs >
  *
  * Reading the file will display:
  *
@@ -712,6 +751,9 @@ static ssize_t amdgpu_set_pp_od_clk_voltage(struct device *dev,
        const char delimiter[3] = {' ', '\n', '\0'};
        uint32_t type;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (count > 127)
                return -EINVAL;
 
@@ -801,6 +843,9 @@ static ssize_t amdgpu_get_pp_od_clk_voltage(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -850,6 +895,9 @@ static ssize_t amdgpu_set_pp_features(struct device *dev,
        uint64_t featuremask;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = kstrtou64(buf, 0, &featuremask);
        if (ret)
                return -EINVAL;
@@ -890,6 +938,9 @@ static ssize_t amdgpu_get_pp_features(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -946,6 +997,9 @@ static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1009,6 +1063,9 @@ static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,
        int ret;
        uint32_t mask = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1040,6 +1097,9 @@ static ssize_t amdgpu_get_pp_dpm_mclk(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1067,6 +1127,9 @@ static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,
        uint32_t mask = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1098,6 +1161,9 @@ static ssize_t amdgpu_get_pp_dpm_socclk(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1125,6 +1191,9 @@ static ssize_t amdgpu_set_pp_dpm_socclk(struct device *dev,
        int ret;
        uint32_t mask = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1158,6 +1227,9 @@ static ssize_t amdgpu_get_pp_dpm_fclk(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1185,6 +1257,9 @@ static ssize_t amdgpu_set_pp_dpm_fclk(struct device *dev,
        int ret;
        uint32_t mask = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1218,6 +1293,9 @@ static ssize_t amdgpu_get_pp_dpm_dcefclk(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1245,6 +1323,9 @@ static ssize_t amdgpu_set_pp_dpm_dcefclk(struct device *dev,
        int ret;
        uint32_t mask = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1278,6 +1359,9 @@ static ssize_t amdgpu_get_pp_dpm_pcie(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1305,6 +1389,9 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,
        int ret;
        uint32_t mask = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = amdgpu_read_mask(buf, count, &mask);
        if (ret)
                return ret;
@@ -1338,6 +1425,9 @@ static ssize_t amdgpu_get_pp_sclk_od(struct device *dev,
        uint32_t value = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1363,6 +1453,9 @@ static ssize_t amdgpu_set_pp_sclk_od(struct device *dev,
        int ret;
        long int value;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = kstrtol(buf, 0, &value);
 
        if (ret)
@@ -1401,6 +1494,9 @@ static ssize_t amdgpu_get_pp_mclk_od(struct device *dev,
        uint32_t value = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1426,6 +1522,9 @@ static ssize_t amdgpu_set_pp_mclk_od(struct device *dev,
        int ret;
        long int value;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = kstrtol(buf, 0, &value);
 
        if (ret)
@@ -1484,6 +1583,9 @@ static ssize_t amdgpu_get_pp_power_profile_mode(struct device *dev,
        ssize_t size;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1519,6 +1621,9 @@ static ssize_t amdgpu_set_pp_power_profile_mode(struct device *dev,
        long int profile_mode = 0;
        const char delimiter[3] = {' ', '\n', '\0'};
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        tmp[0] = *(buf);
        tmp[1] = '\0';
        ret = kstrtol(tmp, 0, &profile_mode);
@@ -1578,6 +1683,9 @@ static ssize_t amdgpu_get_gpu_busy_percent(struct device *dev,
        struct amdgpu_device *adev = ddev->dev_private;
        int r, value, size = sizeof(value);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(ddev->dev);
        if (r < 0)
                return r;
@@ -1611,6 +1719,9 @@ static ssize_t amdgpu_get_mem_busy_percent(struct device *dev,
        struct amdgpu_device *adev = ddev->dev_private;
        int r, value, size = sizeof(value);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(ddev->dev);
        if (r < 0)
                return r;
@@ -1646,9 +1757,18 @@ static ssize_t amdgpu_get_pcie_bw(struct device *dev,
 {
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
-       uint64_t count0, count1;
+       uint64_t count0 = 0, count1 = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
+       if (adev->flags & AMD_IS_APU)
+               return -ENODATA;
+
+       if (!adev->asic_funcs->get_pcie_usage)
+               return -ENODATA;
+
        ret = pm_runtime_get_sync(ddev->dev);
        if (ret < 0)
                return ret;
@@ -1679,6 +1799,9 @@ static ssize_t amdgpu_get_unique_id(struct device *dev,
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (adev->unique_id)
                return snprintf(buf, PAGE_SIZE, "%016llx\n", adev->unique_id);
 
@@ -1710,7 +1833,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
 };
 
 static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
-                              uint32_t mask)
+                              uint32_t mask, enum amdgpu_device_attr_states *states)
 {
        struct device_attribute *dev_attr = &attr->dev_attr;
        const char *attr_name = dev_attr->attr.name;
@@ -1718,42 +1841,42 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
        enum amd_asic_type asic_type = adev->asic_type;
 
        if (!(attr->flags & mask)) {
-               attr->states = ATTR_STATE_UNSUPPORTED;
+               *states = ATTR_STATE_UNSUPPORTED;
                return 0;
        }
 
 #define DEVICE_ATTR_IS(_name)  (!strcmp(attr_name, #_name))
 
        if (DEVICE_ATTR_IS(pp_dpm_socclk)) {
-               if (asic_type <= CHIP_VEGA10)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+               if (asic_type < CHIP_VEGA10)
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {
-               if (asic_type <= CHIP_VEGA10 || asic_type == CHIP_ARCTURUS)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+               if (asic_type < CHIP_VEGA10 || asic_type == CHIP_ARCTURUS)
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pp_dpm_fclk)) {
                if (asic_type < CHIP_VEGA20)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pp_dpm_pcie)) {
                if (asic_type == CHIP_ARCTURUS)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pp_od_clk_voltage)) {
-               attr->states = ATTR_STATE_UNSUPPORTED;
+               *states = ATTR_STATE_UNSUPPORTED;
                if ((is_support_sw_smu(adev) && adev->smu.od_enabled) ||
                    (!is_support_sw_smu(adev) && hwmgr->od_enabled))
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_SUPPORTED;
        } else if (DEVICE_ATTR_IS(mem_busy_percent)) {
                if (adev->flags & AMD_IS_APU || asic_type == CHIP_VEGA10)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pcie_bw)) {
                /* PCIe Perf counters won't work on APU nodes */
                if (adev->flags & AMD_IS_APU)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(unique_id)) {
                if (!adev->unique_id)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pp_features)) {
-               if (adev->flags & AMD_IS_APU || asic_type <= CHIP_VEGA10)
-                       attr->states = ATTR_STATE_UNSUPPORTED;
+               if (adev->flags & AMD_IS_APU || asic_type < CHIP_VEGA10)
+                       *states = ATTR_STATE_UNSUPPORTED;
        }
 
        if (asic_type == CHIP_ARCTURUS) {
@@ -1774,27 +1897,29 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
 
 static int amdgpu_device_attr_create(struct amdgpu_device *adev,
                                     struct amdgpu_device_attr *attr,
-                                    uint32_t mask)
+                                    uint32_t mask, struct list_head *attr_list)
 {
        int ret = 0;
        struct device_attribute *dev_attr = &attr->dev_attr;
        const char *name = dev_attr->attr.name;
+       enum amdgpu_device_attr_states attr_states = ATTR_STATE_SUPPORTED;
+       struct amdgpu_device_attr_entry *attr_entry;
+
        int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
-                          uint32_t mask) = default_attr_update;
+                          uint32_t mask, enum amdgpu_device_attr_states *states) = default_attr_update;
 
        BUG_ON(!attr);
 
        attr_update = attr->attr_update ? attr_update : default_attr_update;
 
-       ret = attr_update(adev, attr, mask);
+       ret = attr_update(adev, attr, mask, &attr_states);
        if (ret) {
                dev_err(adev->dev, "failed to update device file %s, ret = %d\n",
                        name, ret);
                return ret;
        }
 
-       /* the attr->states maybe changed after call attr->attr_update function */
-       if (attr->states == ATTR_STATE_UNSUPPORTED)
+       if (attr_states == ATTR_STATE_UNSUPPORTED)
                return 0;
 
        ret = device_create_file(adev->dev, dev_attr);
@@ -1803,7 +1928,14 @@ static int amdgpu_device_attr_create(struct amdgpu_device *adev,
                        name, ret);
        }
 
-       attr->states = ATTR_STATE_SUPPORTED;
+       attr_entry = kmalloc(sizeof(*attr_entry), GFP_KERNEL);
+       if (!attr_entry)
+               return -ENOMEM;
+
+       attr_entry->attr = attr;
+       INIT_LIST_HEAD(&attr_entry->entry);
+
+       list_add_tail(&attr_entry->entry, attr_list);
 
        return ret;
 }
@@ -1812,24 +1944,23 @@ static void amdgpu_device_attr_remove(struct amdgpu_device *adev, struct amdgpu_
 {
        struct device_attribute *dev_attr = &attr->dev_attr;
 
-       if (attr->states == ATTR_STATE_UNSUPPORTED)
-               return;
-
        device_remove_file(adev->dev, dev_attr);
-
-       attr->states = ATTR_STATE_UNSUPPORTED;
 }
 
+static void amdgpu_device_attr_remove_groups(struct amdgpu_device *adev,
+                                            struct list_head *attr_list);
+
 static int amdgpu_device_attr_create_groups(struct amdgpu_device *adev,
                                            struct amdgpu_device_attr *attrs,
                                            uint32_t counts,
-                                           uint32_t mask)
+                                           uint32_t mask,
+                                           struct list_head *attr_list)
 {
        int ret = 0;
        uint32_t i = 0;
 
        for (i = 0; i < counts; i++) {
-               ret = amdgpu_device_attr_create(adev, &attrs[i], mask);
+               ret = amdgpu_device_attr_create(adev, &attrs[i], mask, attr_list);
                if (ret)
                        goto failed;
        }
@@ -1837,20 +1968,24 @@ static int amdgpu_device_attr_create_groups(struct amdgpu_device *adev,
        return 0;
 
 failed:
-       while (i--)
-               amdgpu_device_attr_remove(adev, &attrs[i]);
+       amdgpu_device_attr_remove_groups(adev, attr_list);
 
        return ret;
 }
 
 static void amdgpu_device_attr_remove_groups(struct amdgpu_device *adev,
-                                            struct amdgpu_device_attr *attrs,
-                                            uint32_t counts)
+                                            struct list_head *attr_list)
 {
-       uint32_t i = 0;
+       struct amdgpu_device_attr_entry *entry, *entry_tmp;
+
+       if (list_empty(attr_list))
+               return ;
 
-       for (i = 0; i < counts; i++)
-               amdgpu_device_attr_remove(adev, &attrs[i]);
+       list_for_each_entry_safe(entry, entry_tmp, attr_list, entry) {
+               amdgpu_device_attr_remove(adev, entry->attr);
+               list_del(&entry->entry);
+               kfree(entry);
+       }
 }
 
 static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
@@ -1861,6 +1996,9 @@ static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
        int channel = to_sensor_dev_attr(attr)->index;
        int r, temp = 0, size = sizeof(temp);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (channel >= PP_TEMP_MAX)
                return -EINVAL;
 
@@ -1992,6 +2130,9 @@ static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev,
        u32 pwm_mode = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(adev->ddev->dev);
        if (ret < 0)
                return ret;
@@ -2023,6 +2164,9 @@ static ssize_t amdgpu_hwmon_set_pwm1_enable(struct device *dev,
        int err, ret;
        int value;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = kstrtoint(buf, 10, &value);
        if (err)
                return err;
@@ -2072,6 +2216,9 @@ static ssize_t amdgpu_hwmon_set_pwm1(struct device *dev,
        u32 value;
        u32 pwm_mode;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = pm_runtime_get_sync(adev->ddev->dev);
        if (err < 0)
                return err;
@@ -2121,6 +2268,9 @@ static ssize_t amdgpu_hwmon_get_pwm1(struct device *dev,
        int err;
        u32 speed = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = pm_runtime_get_sync(adev->ddev->dev);
        if (err < 0)
                return err;
@@ -2151,6 +2301,9 @@ static ssize_t amdgpu_hwmon_get_fan1_input(struct device *dev,
        int err;
        u32 speed = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = pm_runtime_get_sync(adev->ddev->dev);
        if (err < 0)
                return err;
@@ -2180,6 +2333,9 @@ static ssize_t amdgpu_hwmon_get_fan1_min(struct device *dev,
        u32 size = sizeof(min_rpm);
        int r;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2205,6 +2361,9 @@ static ssize_t amdgpu_hwmon_get_fan1_max(struct device *dev,
        u32 size = sizeof(max_rpm);
        int r;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2229,6 +2388,9 @@ static ssize_t amdgpu_hwmon_get_fan1_target(struct device *dev,
        int err;
        u32 rpm = 0;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = pm_runtime_get_sync(adev->ddev->dev);
        if (err < 0)
                return err;
@@ -2258,6 +2420,9 @@ static ssize_t amdgpu_hwmon_set_fan1_target(struct device *dev,
        u32 value;
        u32 pwm_mode;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = pm_runtime_get_sync(adev->ddev->dev);
        if (err < 0)
                return err;
@@ -2304,6 +2469,9 @@ static ssize_t amdgpu_hwmon_get_fan1_enable(struct device *dev,
        u32 pwm_mode = 0;
        int ret;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        ret = pm_runtime_get_sync(adev->ddev->dev);
        if (ret < 0)
                return ret;
@@ -2336,6 +2504,9 @@ static ssize_t amdgpu_hwmon_set_fan1_enable(struct device *dev,
        int value;
        u32 pwm_mode;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        err = kstrtoint(buf, 10, &value);
        if (err)
                return err;
@@ -2376,6 +2547,9 @@ static ssize_t amdgpu_hwmon_show_vddgfx(struct device *dev,
        u32 vddgfx;
        int r, size = sizeof(vddgfx);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2408,6 +2582,9 @@ static ssize_t amdgpu_hwmon_show_vddnb(struct device *dev,
        u32 vddnb;
        int r, size = sizeof(vddnb);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        /* only APUs have vddnb */
        if  (!(adev->flags & AMD_IS_APU))
                return -EINVAL;
@@ -2445,6 +2622,9 @@ static ssize_t amdgpu_hwmon_show_power_avg(struct device *dev,
        int r, size = sizeof(u32);
        unsigned uw;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2481,6 +2661,9 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct device *dev,
        ssize_t size;
        int r;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2510,6 +2693,9 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device *dev,
        ssize_t size;
        int r;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2540,6 +2726,9 @@ static ssize_t amdgpu_hwmon_set_power_cap(struct device *dev,
        int err;
        u32 value;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        if (amdgpu_sriov_vf(adev))
                return -EINVAL;
 
@@ -2578,6 +2767,9 @@ static ssize_t amdgpu_hwmon_show_sclk(struct device *dev,
        uint32_t sclk;
        int r, size = sizeof(sclk);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -2610,6 +2802,9 @@ static ssize_t amdgpu_hwmon_show_mclk(struct device *dev,
        uint32_t mclk;
        int r, size = sizeof(mclk);
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(adev->ddev->dev);
        if (r < 0)
                return r;
@@ -3261,6 +3456,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
        if (adev->pm.dpm_enabled == 0)
                return 0;
 
+       INIT_LIST_HEAD(&adev->pm.pm_attr_list);
+
        adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
                                                                   DRIVER_NAME, adev,
                                                                   hwmon_groups);
@@ -3287,7 +3484,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
        ret = amdgpu_device_attr_create_groups(adev,
                                               amdgpu_device_attrs,
                                               ARRAY_SIZE(amdgpu_device_attrs),
-                                              mask);
+                                              mask,
+                                              &adev->pm.pm_attr_list);
        if (ret)
                return ret;
 
@@ -3304,9 +3502,7 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)
        if (adev->pm.int_hwmon_dev)
                hwmon_device_unregister(adev->pm.int_hwmon_dev);
 
-       amdgpu_device_attr_remove_groups(adev,
-                                        amdgpu_device_attrs,
-                                        ARRAY_SIZE(amdgpu_device_attrs));
+       amdgpu_device_attr_remove_groups(adev, &adev->pm.pm_attr_list);
 }
 
 void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
@@ -3469,6 +3665,9 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
        u32 flags = 0;
        int r;
 
+       if (adev->in_gpu_reset)
+               return -EPERM;
+
        r = pm_runtime_get_sync(dev->dev);
        if (r < 0)
                return r;