gpio: use raw spinlock for gpio chip shadowed data

[linux-2.6-microblaze.git] / drivers / gpio / gpio-dwapb.c

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index b0f3aca..7130195 100644 (file)
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -243,9 +243,9 @@ static void dwapb_irq_ack(struct irq_data *d)
        u32 val = BIT(irqd_to_hwirq(d));
        unsigned long flags;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        dwapb_write(gpio, GPIO_PORTA_EOI, val);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_mask(struct irq_data *d)
@@ -255,10 +255,10 @@ static void dwapb_irq_mask(struct irq_data *d)
        unsigned long flags;
        u32 val;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d));
        dwapb_write(gpio, GPIO_INTMASK, val);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_unmask(struct irq_data *d)
@@ -268,10 +268,10 @@ static void dwapb_irq_unmask(struct irq_data *d)
        unsigned long flags;
        u32 val;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d));
        dwapb_write(gpio, GPIO_INTMASK, val);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_enable(struct irq_data *d)
@@ -281,11 +281,11 @@ static void dwapb_irq_enable(struct irq_data *d)
        unsigned long flags;
        u32 val;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        val = dwapb_read(gpio, GPIO_INTEN);
        val |= BIT(irqd_to_hwirq(d));
        dwapb_write(gpio, GPIO_INTEN, val);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static void dwapb_irq_disable(struct irq_data *d)
@@ -295,11 +295,11 @@ static void dwapb_irq_disable(struct irq_data *d)
        unsigned long flags;
        u32 val;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        val = dwapb_read(gpio, GPIO_INTEN);
        val &= ~BIT(irqd_to_hwirq(d));
        dwapb_write(gpio, GPIO_INTEN, val);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static int dwapb_irq_set_type(struct irq_data *d, u32 type)
@@ -309,7 +309,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
        irq_hw_number_t bit = irqd_to_hwirq(d);
        unsigned long level, polarity, flags;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
        polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
 
@@ -344,7 +344,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
        dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
        if (type != IRQ_TYPE_EDGE_BOTH)
                dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }
@@ -374,7 +374,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
        unsigned long flags, val_deb;
        unsigned long mask = BIT(offset);
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 
        val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
        if (debounce)
@@ -383,7 +383,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
                val_deb &= ~mask;
        dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb);
 
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }
@@ -738,7 +738,7 @@ static int dwapb_gpio_suspend(struct device *dev)
        unsigned long flags;
        int i;
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        for (i = 0; i < gpio->nr_ports; i++) {
                unsigned int offset;
                unsigned int idx = gpio->ports[i].idx;
@@ -765,7 +765,7 @@ static int dwapb_gpio_suspend(struct device *dev)
                        dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en);
                }
        }
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks);
 
@@ -785,7 +785,7 @@ static int dwapb_gpio_resume(struct device *dev)
                return err;
        }
 
-       spin_lock_irqsave(&gc->bgpio_lock, flags);
+       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
        for (i = 0; i < gpio->nr_ports; i++) {
                unsigned int offset;
                unsigned int idx = gpio->ports[i].idx;
@@ -812,7 +812,7 @@ static int dwapb_gpio_resume(struct device *dev)
                        dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
                }
        }
-       spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }