Merge branch 'x86/entry' into ras/core

[linux-2.6-microblaze.git] / drivers / edac / amd64_edac.c

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 9cf7cc1..ef90070 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -4,9 +4,6 @@
 
 static struct edac_pci_ctl_info *pci_ctl;
 
-static int report_gart_errors;
-module_param(report_gart_errors, int, 0644);
-
 /*
  * Set by command line parameter. If BIOS has enabled the ECC, this override is
  * cleared to prevent re-enabling the hardware by this driver.
@@ -2319,6 +2316,16 @@ static struct amd64_family_type family_types[] = {
                        .dbam_to_cs             = f17_addr_mask_to_cs_size,
                }
        },
+       [F17_M60H_CPUS] = {
+               .ctl_name = "F17h_M60h",
+               .f0_id = PCI_DEVICE_ID_AMD_17H_M60H_DF_F0,
+               .f6_id = PCI_DEVICE_ID_AMD_17H_M60H_DF_F6,
+               .max_mcs = 2,
+               .ops = {
+                       .early_channel_count    = f17_early_channel_count,
+                       .dbam_to_cs             = f17_addr_mask_to_cs_size,
+               }
+       },
        [F17_M70H_CPUS] = {
                .ctl_name = "F17h_M70h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F0,
@@ -3357,6 +3364,10 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
                        fam_type = &family_types[F17_M30H_CPUS];
                        pvt->ops = &family_types[F17_M30H_CPUS].ops;
                        break;
+               } else if (pvt->model >= 0x60 && pvt->model <= 0x6f) {
+                       fam_type = &family_types[F17_M60H_CPUS];
+                       pvt->ops = &family_types[F17_M60H_CPUS].ops;
+                       break;
                } else if (pvt->model >= 0x70 && pvt->model <= 0x7f) {
                        fam_type = &family_types[F17_M70H_CPUS];
                        pvt->ops = &family_types[F17_M70H_CPUS].ops;
@@ -3681,9 +3692,6 @@ static int __init amd64_edac_init(void)
        }
 
        /* register stuff with EDAC MCE */
-       if (report_gart_errors)
-               amd_report_gart_errors(true);
-
        if (boot_cpu_data.x86 >= 0x17)
                amd_register_ecc_decoder(decode_umc_error);
        else
@@ -3718,8 +3726,6 @@ static void __exit amd64_edac_exit(void)
                edac_pci_release_generic_ctl(pci_ctl);
 
        /* unregister from EDAC MCE */
-       amd_report_gart_errors(false);
-
        if (boot_cpu_data.x86 >= 0x17)
                amd_unregister_ecc_decoder(decode_umc_error);
        else