perf stat aggregation: Add separate thread member
[linux-2.6-microblaze.git] / drivers / dma / sun6i-dma.c
index f5f9c86..5cadd4d 100644 (file)
@@ -1173,6 +1173,30 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
                             BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
 };
 
+/*
+ * TODO: Add support for more than 4g physical addressing.
+ *
+ * The A100 binding uses the number of dma channels from the
+ * device tree node.
+ */
+static struct sun6i_dma_config sun50i_a100_dma_cfg = {
+       .clock_autogate_enable = sun6i_enable_clock_autogate_h3,
+       .set_burst_length = sun6i_set_burst_length_h3,
+       .set_drq          = sun6i_set_drq_h6,
+       .set_mode         = sun6i_set_mode_h6,
+       .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
+       .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
+       .src_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
+                            BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
+                            BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
+                            BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
+       .dst_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
+                            BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
+                            BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
+                            BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
+       .has_mbus_clk = true,
+};
+
 /*
  * The H6 binding uses the number of dma channels from the
  * device tree node.
@@ -1225,6 +1249,7 @@ static const struct of_device_id sun6i_dma_match[] = {
        { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
        { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
        { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
+       { .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
        { .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
        { /* sentinel */ }
 };