struct clk *ashb_clk;
int irq;
u32 total_chns;
- struct sprd_dma_chn channels[];
+ struct sprd_dma_chn channels[] __counted_by(total_chns);
};
static void sprd_dma_free_desc(struct virt_dma_desc *vd);
u32 chn_count;
int ret, i;
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36));
+ if (ret) {
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret) {
+ dev_err(&pdev->dev, "unable to set coherent mask to 32\n");
+ return ret;
+ }
+ }
+
/* Parse new and deprecated dma-channels properties */
ret = device_property_read_u32(&pdev->dev, "dma-channels", &chn_count);
if (ret)