PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines

[linux-2.6-microblaze.git] / drivers / devfreq / event / rockchip-dfi.c

diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 28c18bb..82d18c6 100644 (file)
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -18,8 +18,10 @@
 #include <linux/list.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/bitfield.h>
 #include <linux/bits.h>
 
+#include <soc/rockchip/rockchip_grf.h>
 #include <soc/rockchip/rk3399_grf.h>
 
 #define DMC_MAX_CHANNELS       2
@@ -75,9 +77,9 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
        writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
 
        /* set ddr type to dfi */
-       if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
+       if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
                writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
-       else if (dfi->ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+       else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
                writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
 
        /* enable count, use software mode */
@@ -192,8 +194,7 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
 
        /* get ddr type */
        regmap_read(regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
-       dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
-                       RK3399_PMUGRF_DDRTYPE_MASK;
+       dfi->ddr_type = FIELD_GET(RK3399_PMUGRF_OS_REG2_DDRTYPE, val);
 
        dfi->channel_mask = GENMASK(1, 0);
        dfi->max_channels = 2;