clk: core: replace clk_{readl,writel} with {readl,writel}

[linux-2.6-microblaze.git] / drivers / clk / zynq / clkc.c

diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index d7b53ac..4b9d5c1 100644 (file)
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -158,7 +158,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
        clks[fclk] = clk_register_gate(NULL, clk_name,
                        div1_name, CLK_SET_RATE_PARENT, fclk_gate_reg,
                        0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
-       enable_reg = clk_readl(fclk_gate_reg) & 1;
+       enable_reg = readl(fclk_gate_reg) & 1;
        if (enable && !enable_reg) {
                if (clk_prepare_enable(clks[fclk]))
                        pr_warn("%s: FCLK%u enable failed\n", __func__,
@@ -287,7 +287,7 @@ static void __init zynq_clk_setup(struct device_node *np)
                        SLCR_IOPLL_CTRL, 4, 1, 0, &iopll_lock);
 
        /* CPU clocks */
-       tmp = clk_readl(SLCR_621_TRUE) & 1;
+       tmp = readl(SLCR_621_TRUE) & 1;
        clk = clk_register_mux(NULL, "cpu_mux", cpu_parents, 4,
                        CLK_SET_RATE_NO_REPARENT, SLCR_ARM_CLK_CTRL, 4, 2, 0,
                        &armclk_lock);
@@ -510,7 +510,7 @@ static void __init zynq_clk_setup(struct device_node *np)
                        &dbgclk_lock);
 
        /* leave debug clocks in the state the bootloader set them up to */
-       tmp = clk_readl(SLCR_DBG_CLK_CTRL);
+       tmp = readl(SLCR_DBG_CLK_CTRL);
        if (tmp & DBG_CLK_CTRL_CLKACT_TRC)
                if (clk_prepare_enable(clks[dbg_trc]))
                        pr_warn("%s: trace clk enable failed\n", __func__);