clk: renesas: r9a07g044: Add P2 Clock support

[linux-2.6-microblaze.git] / drivers / clk / renesas / renesas-rzg2l-cpg.h

diff --git a/drivers/clk/renesas/renesas-rzg2l-cpg.h b/drivers/clk/renesas/renesas-rzg2l-cpg.h
index 3948bdd..a6a3bad 100644 (file)
--- a/drivers/clk/renesas/renesas-rzg2l-cpg.h
+++ b/drivers/clk/renesas/renesas-rzg2l-cpg.h
@@ -21,6 +21,7 @@
 #define DDIV_PACK(offset, bitpos, size) \
                (((offset) << 20) | ((bitpos) << 12) | ((size) << 8))
 #define DIVPL2A                DDIV_PACK(CPG_PL2_DDIV, 0, 3)
+#define DIVPL3A                DDIV_PACK(CPG_PL3A_DDIV, 0, 3)
 #define DIVPL3B                DDIV_PACK(CPG_PL3A_DDIV, 4, 3)
 
 /**