Merge tag 'renesas-r8a779a0-dt-binding-defs-tag' into clk-renesas-for-v5.10

[linux-2.6-microblaze.git] / drivers / clk / renesas / r8a7790-cpg-mssr.c

diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index f936cb7..f7d233e 100644 (file)
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * r8a7790 Clock Pulse Generator / Module Standby and Software Reset
  *
@@ -6,10 +7,6 @@
  * Based on clk-rcar-gen2.c
  *
  * Copyright (C) 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 
 #include <linux/device.h>
@@ -111,8 +108,8 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] __initconst = {
        DEF_MOD("tmu0",                  125,   R8A7790_CLK_CP),
        DEF_MOD("vsp1du1",               127,   R8A7790_CLK_ZS),
        DEF_MOD("vsp1du0",               128,   R8A7790_CLK_ZS),
-       DEF_MOD("vsp1-rt",               130,   R8A7790_CLK_ZS),
-       DEF_MOD("vsp1-sy",               131,   R8A7790_CLK_ZS),
+       DEF_MOD("vspr",                  130,   R8A7790_CLK_ZS),
+       DEF_MOD("vsps",                  131,   R8A7790_CLK_ZS),
        DEF_MOD("scifa2",                202,   R8A7790_CLK_MP),
        DEF_MOD("scifa1",                203,   R8A7790_CLK_MP),
        DEF_MOD("scifa0",                204,   R8A7790_CLK_MP),