clk: core: replace clk_{readl,writel} with {readl,writel}

[linux-2.6-microblaze.git] / drivers / clk / imx / clk-sccg-pll.c

diff --git a/drivers/clk/imx/clk-sccg-pll.c b/drivers/clk/imx/clk-sccg-pll.c
index 9dfd03a..991bbe6 100644 (file)
--- a/drivers/clk/imx/clk-sccg-pll.c
+++ b/drivers/clk/imx/clk-sccg-pll.c
@@ -348,7 +348,7 @@ static unsigned long clk_sccg_pll_recalc_rate(struct clk_hw *hw,
 
        temp64 = parent_rate;
 
-       val = clk_readl(pll->base + PLL_CFG0);
+       val = readl(pll->base + PLL_CFG0);
        if (val & SSCG_PLL_BYPASS2_MASK) {
                temp64 = parent_rate;
        } else if (val & SSCG_PLL_BYPASS1_MASK) {
@@ -371,10 +371,10 @@ static int clk_sccg_pll_set_rate(struct clk_hw *hw, unsigned long rate,
        u32 val;
 
        /* set bypass here too since the parent might be the same */
-       val = clk_readl(pll->base + PLL_CFG0);
+       val = readl(pll->base + PLL_CFG0);
        val &= ~SSCG_PLL_BYPASS_MASK;
        val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass);
-       clk_writel(val, pll->base + PLL_CFG0);
+       writel(val, pll->base + PLL_CFG0);
 
        val = readl_relaxed(pll->base + PLL_CFG2);
        val &= ~(PLL_DIVF1_MASK | PLL_DIVF2_MASK);
@@ -395,7 +395,7 @@ static u8 clk_sccg_pll_get_parent(struct clk_hw *hw)
        u32 val;
        u8 ret = pll->parent;
 
-       val = clk_readl(pll->base + PLL_CFG0);
+       val = readl(pll->base + PLL_CFG0);
        if (val & SSCG_PLL_BYPASS2_MASK)
                ret = pll->bypass2;
        else if (val & SSCG_PLL_BYPASS1_MASK)
@@ -408,10 +408,10 @@ static int clk_sccg_pll_set_parent(struct clk_hw *hw, u8 index)
        struct clk_sccg_pll *pll = to_clk_sccg_pll(hw);
        u32 val;
 
-       val = clk_readl(pll->base + PLL_CFG0);
+       val = readl(pll->base + PLL_CFG0);
        val &= ~SSCG_PLL_BYPASS_MASK;
        val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass);
-       clk_writel(val, pll->base + PLL_CFG0);
+       writel(val, pll->base + PLL_CFG0);
 
        return clk_sccg_pll_wait_lock(pll);
 }