Introduce cpu_dcache_is_aliasing() across all architectures

[linux-2.6-microblaze.git] / arch / xtensa / include / asm / cachetype.h

diff --git a/arch/xtensa/include/asm/cachetype.h b/arch/xtensa/include/asm/cachetype.h
new file mode 100644 (file)
index 0000000..51bd49e
--- /dev/null
+++ b/arch/xtensa/include/asm/cachetype.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_XTENSA_CACHETYPE_H
+#define __ASM_XTENSA_CACHETYPE_H
+
+#include <asm/cache.h>
+#include <asm/page.h>
+
+#define cpu_dcache_is_aliasing()       (DCACHE_WAY_SIZE > PAGE_SIZE)
+
+#endif