Merge tag 'x86_seves_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-2.6-microblaze.git] / arch / x86 / kernel / idt.c

diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index 1bffb87..ee1a283 100644 (file)
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -11,13 +11,6 @@
 #include <asm/desc.h>
 #include <asm/hw_irq.h>
 
-struct idt_data {
-       unsigned int    vector;
-       unsigned int    segment;
-       struct idt_bits bits;
-       const void      *addr;
-};
-
 #define DPL0           0x0
 #define DPL3           0x3
 
@@ -175,20 +168,6 @@ bool idt_is_f00f_address(unsigned long address)
 }
 #endif
 
-static inline void idt_init_desc(gate_desc *gate, const struct idt_data *d)
-{
-       unsigned long addr = (unsigned long) d->addr;
-
-       gate->offset_low        = (u16) addr;
-       gate->segment           = (u16) d->segment;
-       gate->bits              = d->bits;
-       gate->offset_middle     = (u16) (addr >> 16);
-#ifdef CONFIG_X86_64
-       gate->offset_high       = (u32) (addr >> 32);
-       gate->reserved          = 0;
-#endif
-}
-
 static __init void
 idt_setup_from_table(gate_desc *idt, const struct idt_data *t, int size, bool sys)
 {
@@ -206,14 +185,7 @@ static __init void set_intr_gate(unsigned int n, const void *addr)
 {
        struct idt_data data;
 
-       BUG_ON(n > 0xFF);
-
-       memset(&data, 0, sizeof(data));
-       data.vector     = n;
-       data.addr       = addr;
-       data.segment    = __KERNEL_CS;
-       data.bits.type  = GATE_INTERRUPT;
-       data.bits.p     = 1;
+       init_idt_data(&data, n, addr);
 
        idt_setup_from_table(idt_table, &data, 1, false);
 }
@@ -254,11 +226,14 @@ static const __initconst struct idt_data early_pf_idts[] = {
  * cpu_init() when the TSS has been initialized.
  */
 static const __initconst struct idt_data ist_idts[] = {
-       ISTG(X86_TRAP_DB,       asm_exc_debug,          IST_INDEX_DB),
-       ISTG(X86_TRAP_NMI,      asm_exc_nmi,            IST_INDEX_NMI),
-       ISTG(X86_TRAP_DF,       asm_exc_double_fault,   IST_INDEX_DF),
+       ISTG(X86_TRAP_DB,       asm_exc_debug,                  IST_INDEX_DB),
+       ISTG(X86_TRAP_NMI,      asm_exc_nmi,                    IST_INDEX_NMI),
+       ISTG(X86_TRAP_DF,       asm_exc_double_fault,           IST_INDEX_DF),
 #ifdef CONFIG_X86_MCE
-       ISTG(X86_TRAP_MC,       asm_exc_machine_check,  IST_INDEX_MCE),
+       ISTG(X86_TRAP_MC,       asm_exc_machine_check,          IST_INDEX_MCE),
+#endif
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+       ISTG(X86_TRAP_VC,       asm_exc_vmm_communication,      IST_INDEX_VC),
 #endif
 };