x86/microcode/intel: Extend BDW late-loading further with LLC size check

[linux-2.6-microblaze.git] / arch / x86 / kernel / cpu / microcode / intel.c

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index d9e460f..f7c55b0 100644 (file)
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -45,6 +45,9 @@ static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
 /* Current microcode patch used in early patching on the APs. */
 static struct microcode_intel *intel_ucode_patch;
 
+/* last level cache size per core */
+static int llc_size_per_core;
+
 static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
                                        unsigned int s2, unsigned int p2)
 {
@@ -912,12 +915,14 @@ static bool is_blacklisted(unsigned int cpu)
 
        /*
         * Late loading on model 79 with microcode revision less than 0x0b000021
-        * may result in a system hang. This behavior is documented in item
-        * BDF90, #334165 (Intel Xeon Processor E7-8800/4800 v4 Product Family).
+        * and LLC size per core bigger than 2.5MB may result in a system hang.
+        * This behavior is documented in item BDF90, #334165 (Intel Xeon
+        * Processor E7-8800/4800 v4 Product Family).
         */
        if (c->x86 == 6 &&
            c->x86_model == INTEL_FAM6_BROADWELL_X &&
            c->x86_mask == 0x01 &&
+           llc_size_per_core > 2621440 &&
            c->microcode < 0x0b000021) {
                pr_err_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode);
                pr_err_once("Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
@@ -975,6 +980,15 @@ static struct microcode_ops microcode_intel_ops = {
        .apply_microcode                  = apply_microcode_intel,
 };
 
+static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
+{
+       u64 llc_size = c->x86_cache_size * 1024;
+
+       do_div(llc_size, c->x86_max_cores);
+
+       return (int)llc_size;
+}
+
 struct microcode_ops * __init init_intel_microcode(void)
 {
        struct cpuinfo_x86 *c = &boot_cpu_data;
@@ -985,5 +999,7 @@ struct microcode_ops * __init init_intel_microcode(void)
                return NULL;
        }
 
+       llc_size_per_core = calc_llc_size_per_core(c);
+
        return &microcode_intel_ops;
 }