Merge tag 'x86_seves_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-2.6-microblaze.git] / arch / x86 / kernel / cpu / common.c

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index beffea2..35ad848 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -23,6 +23,7 @@
 #include <linux/syscore_ops.h>
 #include <linux/pgtable.h>
 
+#include <asm/cmdline.h>
 #include <asm/stackprotector.h>
 #include <asm/perf_event.h>
 #include <asm/mmu_context.h>
@@ -359,7 +360,7 @@ void native_write_cr0(unsigned long val)
        unsigned long bits_missing = 0;
 
 set_register:
-       asm volatile("mov %0,%%cr0": "+r" (val), "+m" (__force_order));
+       asm volatile("mov %0,%%cr0": "+r" (val) : : "memory");
 
        if (static_branch_likely(&cr_pinning)) {
                if (unlikely((val & X86_CR0_WP) != X86_CR0_WP)) {
@@ -378,7 +379,7 @@ void native_write_cr4(unsigned long val)
        unsigned long bits_changed = 0;
 
 set_register:
-       asm volatile("mov %0,%%cr4": "+r" (val), "+m" (cr4_pinned_bits));
+       asm volatile("mov %0,%%cr4": "+r" (val) : : "memory");
 
        if (static_branch_likely(&cr_pinning)) {
                if (unlikely((val & cr4_pinned_mask) != cr4_pinned_bits)) {
@@ -1220,6 +1221,59 @@ static void detect_nopl(void)
 #endif
 }
 
+/*
+ * We parse cpu parameters early because fpu__init_system() is executed
+ * before parse_early_param().
+ */
+static void __init cpu_parse_early_param(void)
+{
+       char arg[128];
+       char *argptr = arg;
+       int arglen, res, bit;
+
+#ifdef CONFIG_X86_32
+       if (cmdline_find_option_bool(boot_command_line, "no387"))
+#ifdef CONFIG_MATH_EMULATION
+               setup_clear_cpu_cap(X86_FEATURE_FPU);
+#else
+               pr_err("Option 'no387' required CONFIG_MATH_EMULATION enabled.\n");
+#endif
+
+       if (cmdline_find_option_bool(boot_command_line, "nofxsr"))
+               setup_clear_cpu_cap(X86_FEATURE_FXSR);
+#endif
+
+       if (cmdline_find_option_bool(boot_command_line, "noxsave"))
+               setup_clear_cpu_cap(X86_FEATURE_XSAVE);
+
+       if (cmdline_find_option_bool(boot_command_line, "noxsaveopt"))
+               setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
+
+       if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
+               setup_clear_cpu_cap(X86_FEATURE_XSAVES);
+
+       arglen = cmdline_find_option(boot_command_line, "clearcpuid", arg, sizeof(arg));
+       if (arglen <= 0)
+               return;
+
+       pr_info("Clearing CPUID bits:");
+       do {
+               res = get_option(&argptr, &bit);
+               if (res == 0 || res == 3)
+                       break;
+
+               /* If the argument was too long, the last bit may be cut off */
+               if (res == 1 && arglen >= sizeof(arg))
+                       break;
+
+               if (bit >= 0 && bit < NCAPINTS * 32) {
+                       pr_cont(" " X86_CAP_FMT, x86_cap_flag(bit));
+                       setup_clear_cpu_cap(bit);
+               }
+       } while (res == 2);
+       pr_cont("\n");
+}
+
 /*
  * Do minimum CPU detection early.
  * Fields really needed: vendor, cpuid_level, family, model, mask,
@@ -1255,6 +1309,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
                get_cpu_cap(c);
                get_cpu_address_sizes(c);
                setup_force_cpu_cap(X86_FEATURE_CPUID);
+               cpu_parse_early_param();
 
                if (this_cpu->c_early_init)
                        this_cpu->c_early_init(c);
@@ -1413,15 +1468,7 @@ static void generic_identify(struct cpuinfo_x86 *c)
         * ESPFIX issue, we can change this.
         */
 #ifdef CONFIG_X86_32
-# ifdef CONFIG_PARAVIRT_XXL
-       do {
-               extern void native_iret(void);
-               if (pv_ops.cpu.iret == native_iret)
-                       set_cpu_bug(c, X86_BUG_ESPFIX);
-       } while (0);
-# else
        set_cpu_bug(c, X86_BUG_ESPFIX);
-# endif
 #endif
 }