Merge branch 'akpm' (patches from Andrew)

[linux-2.6-microblaze.git] / arch / x86 / kernel / cpu / bugs.c

diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index ed54b3b..b6f887b 100644 (file)
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -15,6 +15,7 @@
 #include <linux/nospec.h>
 #include <linux/prctl.h>
 #include <linux/sched/smt.h>
+#include <linux/pgtable.h>
 
 #include <asm/spec-ctrl.h>
 #include <asm/cmdline.h>
@@ -26,7 +27,6 @@
 #include <asm/vmx.h>
 #include <asm/paravirt.h>
 #include <asm/alternative.h>
-#include <asm/pgtable.h>
 #include <asm/set_memory.h>
 #include <asm/intel-family.h>
 #include <asm/e820/api.h>
@@ -41,6 +41,7 @@ static void __init l1tf_select_mitigation(void);
 static void __init mds_select_mitigation(void);
 static void __init mds_print_mitigation(void);
 static void __init taa_select_mitigation(void);
+static void __init srbds_select_mitigation(void);
 
 /* The base value of the SPEC_CTRL MSR that always has to be preserved. */
 u64 x86_spec_ctrl_base;
@@ -108,6 +109,7 @@ void __init check_bugs(void)
        l1tf_select_mitigation();
        mds_select_mitigation();
        taa_select_mitigation();
+       srbds_select_mitigation();
 
        /*
         * As MDS and TAA mitigations are inter-related, print MDS
@@ -397,6 +399,97 @@ static int __init tsx_async_abort_parse_cmdline(char *str)
 }
 early_param("tsx_async_abort", tsx_async_abort_parse_cmdline);
 
+#undef pr_fmt
+#define pr_fmt(fmt)    "SRBDS: " fmt
+
+enum srbds_mitigations {
+       SRBDS_MITIGATION_OFF,
+       SRBDS_MITIGATION_UCODE_NEEDED,
+       SRBDS_MITIGATION_FULL,
+       SRBDS_MITIGATION_TSX_OFF,
+       SRBDS_MITIGATION_HYPERVISOR,
+};
+
+static enum srbds_mitigations srbds_mitigation __ro_after_init = SRBDS_MITIGATION_FULL;
+
+static const char * const srbds_strings[] = {
+       [SRBDS_MITIGATION_OFF]          = "Vulnerable",
+       [SRBDS_MITIGATION_UCODE_NEEDED] = "Vulnerable: No microcode",
+       [SRBDS_MITIGATION_FULL]         = "Mitigation: Microcode",
+       [SRBDS_MITIGATION_TSX_OFF]      = "Mitigation: TSX disabled",
+       [SRBDS_MITIGATION_HYPERVISOR]   = "Unknown: Dependent on hypervisor status",
+};
+
+static bool srbds_off;
+
+void update_srbds_msr(void)
+{
+       u64 mcu_ctrl;
+
+       if (!boot_cpu_has_bug(X86_BUG_SRBDS))
+               return;
+
+       if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+               return;
+
+       if (srbds_mitigation == SRBDS_MITIGATION_UCODE_NEEDED)
+               return;
+
+       rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
+
+       switch (srbds_mitigation) {
+       case SRBDS_MITIGATION_OFF:
+       case SRBDS_MITIGATION_TSX_OFF:
+               mcu_ctrl |= RNGDS_MITG_DIS;
+               break;
+       case SRBDS_MITIGATION_FULL:
+               mcu_ctrl &= ~RNGDS_MITG_DIS;
+               break;
+       default:
+               break;
+       }
+
+       wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
+}
+
+static void __init srbds_select_mitigation(void)
+{
+       u64 ia32_cap;
+
+       if (!boot_cpu_has_bug(X86_BUG_SRBDS))
+               return;
+
+       /*
+        * Check to see if this is one of the MDS_NO systems supporting
+        * TSX that are only exposed to SRBDS when TSX is enabled.
+        */
+       ia32_cap = x86_read_arch_cap_msr();
+       if ((ia32_cap & ARCH_CAP_MDS_NO) && !boot_cpu_has(X86_FEATURE_RTM))
+               srbds_mitigation = SRBDS_MITIGATION_TSX_OFF;
+       else if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+               srbds_mitigation = SRBDS_MITIGATION_HYPERVISOR;
+       else if (!boot_cpu_has(X86_FEATURE_SRBDS_CTRL))
+               srbds_mitigation = SRBDS_MITIGATION_UCODE_NEEDED;
+       else if (cpu_mitigations_off() || srbds_off)
+               srbds_mitigation = SRBDS_MITIGATION_OFF;
+
+       update_srbds_msr();
+       pr_info("%s\n", srbds_strings[srbds_mitigation]);
+}
+
+static int __init srbds_parse_cmdline(char *str)
+{
+       if (!str)
+               return -EINVAL;
+
+       if (!boot_cpu_has_bug(X86_BUG_SRBDS))
+               return 0;
+
+       srbds_off = !strcmp(str, "off");
+       return 0;
+}
+early_param("srbds", srbds_parse_cmdline);
+
 #undef pr_fmt
 #define pr_fmt(fmt)     "Spectre V1 : " fmt
 
@@ -1528,6 +1621,11 @@ static char *ibpb_state(void)
        return "";
 }
 
+static ssize_t srbds_show_state(char *buf)
+{
+       return sprintf(buf, "%s\n", srbds_strings[srbds_mitigation]);
+}
+
 static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
                               char *buf, unsigned int bug)
 {
@@ -1572,6 +1670,9 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr
        case X86_BUG_ITLB_MULTIHIT:
                return itlb_multihit_show_state(buf);
 
+       case X86_BUG_SRBDS:
+               return srbds_show_state(buf);
+
        default:
                break;
        }
@@ -1618,4 +1719,9 @@ ssize_t cpu_show_itlb_multihit(struct device *dev, struct device_attribute *attr
 {
        return cpu_show_common(dev, attr, buf, X86_BUG_ITLB_MULTIHIT);
 }
+
+ssize_t cpu_show_srbds(struct device *dev, struct device_attribute *attr, char *buf)
+{
+       return cpu_show_common(dev, attr, buf, X86_BUG_SRBDS);
+}
 #endif