perf/amd/uncore: Add support for Family 19h L3 PMU

[linux-2.6-microblaze.git] / arch / x86 / include / asm / perf_event.h

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 29964b0..e855e9c 100644 (file)
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -50,11 +50,22 @@
 
 #define AMD64_L3_SLICE_SHIFT                           48
 #define AMD64_L3_SLICE_MASK                            \
-       ((0xFULL) << AMD64_L3_SLICE_SHIFT)
+       (0xFULL << AMD64_L3_SLICE_SHIFT)
+#define AMD64_L3_SLICEID_MASK                          \
+       (0x7ULL << AMD64_L3_SLICE_SHIFT)
 
 #define AMD64_L3_THREAD_SHIFT                          56
 #define AMD64_L3_THREAD_MASK                           \
-       ((0xFFULL) << AMD64_L3_THREAD_SHIFT)
+       (0xFFULL << AMD64_L3_THREAD_SHIFT)
+#define AMD64_L3_F19H_THREAD_MASK                      \
+       (0x3ULL << AMD64_L3_THREAD_SHIFT)
+
+#define AMD64_L3_EN_ALL_CORES                          BIT_ULL(47)
+#define AMD64_L3_EN_ALL_SLICES                         BIT_ULL(46)
+
+#define AMD64_L3_COREID_SHIFT                          42
+#define AMD64_L3_COREID_MASK                           \
+       (0x7ULL << AMD64_L3_COREID_SHIFT)
 
 #define X86_RAW_EVENT_MASK             \
        (ARCH_PERFMON_EVENTSEL_EVENT |  \