sparc64: implement the new page table range API
[linux-2.6-microblaze.git] / arch / sparc / mm / init_64.c
index 9a63a3e..f830179 100644 (file)
@@ -195,21 +195,26 @@ atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
 #endif
 #endif
 
-inline void flush_dcache_page_impl(struct page *page)
+inline void flush_dcache_folio_impl(struct folio *folio)
 {
+       unsigned int i, nr = folio_nr_pages(folio);
+
        BUG_ON(tlb_type == hypervisor);
 #ifdef CONFIG_DEBUG_DCFLUSH
        atomic_inc(&dcpage_flushes);
 #endif
 
 #ifdef DCACHE_ALIASING_POSSIBLE
-       __flush_dcache_page(page_address(page),
-                           ((tlb_type == spitfire) &&
-                            page_mapping_file(page) != NULL));
+       for (i = 0; i < nr; i++)
+               __flush_dcache_page(folio_address(folio) + i * PAGE_SIZE,
+                                   ((tlb_type == spitfire) &&
+                                    folio_flush_mapping(folio) != NULL));
 #else
-       if (page_mapping_file(page) != NULL &&
-           tlb_type == spitfire)
-               __flush_icache_page(__pa(page_address(page)));
+       if (folio_flush_mapping(folio) != NULL &&
+           tlb_type == spitfire) {
+               for (i = 0; i < nr; i++)
+                       __flush_icache_page((pfn + i) * PAGE_SIZE);
+       }
 #endif
 }
 
@@ -218,10 +223,10 @@ inline void flush_dcache_page_impl(struct page *page)
 #define PG_dcache_cpu_mask     \
        ((1UL<<ilog2(roundup_pow_of_two(NR_CPUS)))-1UL)
 
-#define dcache_dirty_cpu(page) \
-       (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
+#define dcache_dirty_cpu(folio) \
+       (((folio)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
 
-static inline void set_dcache_dirty(struct page *page, int this_cpu)
+static inline void set_dcache_dirty(struct folio *folio, int this_cpu)
 {
        unsigned long mask = this_cpu;
        unsigned long non_cpu_bits;
@@ -238,11 +243,11 @@ static inline void set_dcache_dirty(struct page *page, int this_cpu)
                             "bne,pn    %%xcc, 1b\n\t"
                             " nop"
                             : /* no outputs */
-                            : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
+                            : "r" (mask), "r" (non_cpu_bits), "r" (&folio->flags)
                             : "g1", "g7");
 }
 
-static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
+static inline void clear_dcache_dirty_cpu(struct folio *folio, unsigned long cpu)
 {
        unsigned long mask = (1UL << PG_dcache_dirty);
 
@@ -260,7 +265,7 @@ static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
                             " nop\n"
                             "2:"
                             : /* no outputs */
-                            : "r" (cpu), "r" (mask), "r" (&page->flags),
+                            : "r" (cpu), "r" (mask), "r" (&folio->flags),
                               "i" (PG_dcache_cpu_mask),
                               "i" (PG_dcache_cpu_shift)
                             : "g1", "g7");
@@ -284,9 +289,10 @@ static void flush_dcache(unsigned long pfn)
 
        page = pfn_to_page(pfn);
        if (page) {
+               struct folio *folio = page_folio(page);
                unsigned long pg_flags;
 
-               pg_flags = page->flags;
+               pg_flags = folio->flags;
                if (pg_flags & (1UL << PG_dcache_dirty)) {
                        int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
                                   PG_dcache_cpu_mask);
@@ -296,11 +302,11 @@ static void flush_dcache(unsigned long pfn)
                         * in the SMP case.
                         */
                        if (cpu == this_cpu)
-                               flush_dcache_page_impl(page);
+                               flush_dcache_folio_impl(folio);
                        else
-                               smp_flush_dcache_page_impl(page, cpu);
+                               smp_flush_dcache_folio_impl(folio, cpu);
 
-                       clear_dcache_dirty_cpu(page, cpu);
+                       clear_dcache_dirty_cpu(folio, cpu);
 
                        put_cpu();
                }
@@ -388,12 +394,14 @@ bool __init arch_hugetlb_valid_size(unsigned long size)
 }
 #endif /* CONFIG_HUGETLB_PAGE */
 
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
+void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,
+               unsigned long address, pte_t *ptep, unsigned int nr)
 {
        struct mm_struct *mm;
        unsigned long flags;
        bool is_huge_tsb;
        pte_t pte = *ptep;
+       unsigned int i;
 
        if (tlb_type != hypervisor) {
                unsigned long pfn = pte_pfn(pte);
@@ -440,15 +448,21 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
                }
        }
 #endif
-       if (!is_huge_tsb)
-               __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,
-                                       address, pte_val(pte));
+       if (!is_huge_tsb) {
+               for (i = 0; i < nr; i++) {
+                       __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,
+                                               address, pte_val(pte));
+                       address += PAGE_SIZE;
+                       pte_val(pte) += PAGE_SIZE;
+               }
+       }
 
        spin_unlock_irqrestore(&mm->context.lock, flags);
 }
 
-void flush_dcache_page(struct page *page)
+void flush_dcache_folio(struct folio *folio)
 {
+       unsigned long pfn = folio_pfn(folio);
        struct address_space *mapping;
        int this_cpu;
 
@@ -459,35 +473,35 @@ void flush_dcache_page(struct page *page)
         * is merely the zero page.  The 'bigcore' testcase in GDB
         * causes this case to run millions of times.
         */
-       if (page == ZERO_PAGE(0))
+       if (is_zero_pfn(pfn))
                return;
 
        this_cpu = get_cpu();
 
-       mapping = page_mapping_file(page);
+       mapping = folio_flush_mapping(folio);
        if (mapping && !mapping_mapped(mapping)) {
-               int dirty = test_bit(PG_dcache_dirty, &page->flags);
+               bool dirty = test_bit(PG_dcache_dirty, &folio->flags);
                if (dirty) {
-                       int dirty_cpu = dcache_dirty_cpu(page);
+                       int dirty_cpu = dcache_dirty_cpu(folio);
 
                        if (dirty_cpu == this_cpu)
                                goto out;
-                       smp_flush_dcache_page_impl(page, dirty_cpu);
+                       smp_flush_dcache_folio_impl(folio, dirty_cpu);
                }
-               set_dcache_dirty(page, this_cpu);
+               set_dcache_dirty(folio, this_cpu);
        } else {
                /* We could delay the flush for the !page_mapping
                 * case too.  But that case is for exec env/arg
                 * pages and those are %99 certainly going to get
                 * faulted into the tlb (and thus flushed) anyways.
                 */
-               flush_dcache_page_impl(page);
+               flush_dcache_folio_impl(folio);
        }
 
 out:
        put_cpu();
 }
-EXPORT_SYMBOL(flush_dcache_page);
+EXPORT_SYMBOL(flush_dcache_folio);
 
 void __kprobes flush_icache_range(unsigned long start, unsigned long end)
 {
@@ -2280,10 +2294,10 @@ void __init paging_init(void)
        setup_page_offset();
 
        /* These build time checkes make sure that the dcache_dirty_cpu()
-        * page->flags usage will work.
+        * folio->flags usage will work.
         *
         * When a page gets marked as dcache-dirty, we store the
-        * cpu number starting at bit 32 in the page->flags.  Also,
+        * cpu number starting at bit 32 in the folio->flags.  Also,
         * functions like clear_dcache_dirty_cpu use the cpu mask
         * in 13-bit signed-immediate instruction fields.
         */