Merge tag 'folio-5.18d' of git://git.infradead.org/users/willy/pagecache

[linux-2.6-microblaze.git] / arch / s390 / kernel / entry.S

diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 1f6df6d..59b69c8 100644 (file)
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -10,6 +10,7 @@
 
 #include <linux/init.h>
 #include <linux/linkage.h>
+#include <asm/asm-extable.h>
 #include <asm/alternative-asm.h>
 #include <asm/processor.h>
 #include <asm/cache.h>
@@ -97,11 +98,6 @@ _LPP_OFFSET  = __LC_LPP
 #endif
        .endm
 
-       .macro STCK savearea
-       ALTERNATIVE ".insn      s,0xb2050000,\savearea", \
-                   ".insn      s,0xb27c0000,\savearea", 25
-       .endm
-
        /*
         * The TSTMSK macro generates a test-under-mask instruction by
         * calculating the memory offset for the specified mask value.
@@ -125,22 +121,22 @@ _LPP_OFFSET       = __LC_LPP
        .endm
 
        .macro BPOFF
-       ALTERNATIVE "", ".long 0xb2e8c000", 82
+       ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,12,0", 82
        .endm
 
        .macro BPON
-       ALTERNATIVE "", ".long 0xb2e8d000", 82
+       ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,13,0", 82
        .endm
 
        .macro BPENTER tif_ptr,tif_mask
-       ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
+       ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \
                    "", 82
        .endm
 
        .macro BPEXIT tif_ptr,tif_mask
        TSTMSK  \tif_ptr,\tif_mask
-       ALTERNATIVE "jz .+8;  .long 0xb2e8c000", \
-                   "jnz .+8; .long 0xb2e8d000", 82
+       ALTERNATIVE "jz .+8;  .insn rrf,0xb2e80000,0,0,12,0", \
+                   "jnz .+8; .insn rrf,0xb2e80000,0,0,13,0", 82
        .endm
 
        /*
@@ -230,7 +226,7 @@ ENTRY(__switch_to)
        aghi    %r3,__TASK_pid
        mvc     __LC_CURRENT_PID(4,%r0),0(%r3)  # store pid of next
        lmg     %r6,%r15,__SF_GPRS(%r15)        # load gprs of next task
-       ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
+       ALTERNATIVE "", "lpp _LPP_OFFSET", 40
        BR_EX   %r14
 ENDPROC(__switch_to)
 
@@ -441,7 +437,7 @@ ENDPROC(pgm_check_handler)
  */
 .macro INT_HANDLER name,lc_old_psw,handler
 ENTRY(\name)
-       STCK    __LC_INT_CLOCK
+       stckf   __LC_INT_CLOCK
        stpt    __LC_SYS_ENTER_TIMER
        STBEAR  __LC_LAST_BREAK
        BPOFF
@@ -513,7 +509,7 @@ ENTRY(psw_idle)
 .Lpsw_idle_stcctm:
        oi      __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
        BPON
-       STCK    __CLOCK_IDLE_ENTER(%r2)
+       stckf   __CLOCK_IDLE_ENTER(%r2)
        stpt    __TIMER_IDLE_ENTER(%r2)
        lpswe   __SF_EMPTY(%r15)
 .globl psw_idle_exit
@@ -525,7 +521,7 @@ ENDPROC(psw_idle)
  * Machine check handler routines
  */
 ENTRY(mcck_int_handler)
-       STCK    __LC_MCCK_CLOCK
+       stckf   __LC_MCCK_CLOCK
        BPOFF
        la      %r1,4095                # validate r1
        spt     __LC_CPU_TIMER_SAVE_AREA-4095(%r1)      # validate cpu timer
@@ -652,7 +648,7 @@ ENTRY(mcck_int_handler)
 ENDPROC(mcck_int_handler)
 
 ENTRY(restart_int_handler)
-       ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
+       ALTERNATIVE "", "lpp _LPP_OFFSET", 40
        stg     %r15,__LC_SAVE_AREA_RESTART
        TSTMSK  __LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4
        jz      0f