powerpc/powernv: Increase PE# capacity

[linux-2.6-microblaze.git] / arch / powerpc / platforms / powernv / pci-ioda.c

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3a5ea82..393d324 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -197,7 +197,7 @@ static int pnv_ioda2_init_m64(struct pnv_phb *phb)
 
        /*
         * Strip off the segment used by the reserved PE, which is
-        * expected to be 0 or last one of PE capabicity.
+        * expected to be 0 or last one of PE capability.
         */
        r = &phb->hose->mem_resources[1];
        if (phb->ioda.reserved_pe_idx == 0)
@@ -761,7 +761,7 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
 
        /* Clear the reverse map */
        for (rid = pe->rid; rid < rid_end; rid++)
-               phb->ioda.pe_rmap[rid] = 0;
+               phb->ioda.pe_rmap[rid] = IODA_INVALID_PE;
 
        /* Release from all parents PELT-V */
        while (parent) {
@@ -2702,8 +2702,6 @@ static void pnv_ioda_setup_dma(struct pnv_phb *phb)
        pr_info("PCI: Domain %04x has %d available 32-bit DMA segments\n",
                hose->global_number, phb->ioda.dma32_count);
 
-       pnv_pci_ioda_setup_opal_tce_kill(phb);
-
        /* Walk our PE list and configure their DMA segments */
        list_for_each_entry(pe, &phb->ioda.pe_list, list) {
                weight = pnv_pci_ioda_pe_dma_weight(pe);
@@ -2793,7 +2791,9 @@ int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
        pe_info(pe, "Switching PHB to CXL\n");
 
        rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number);
-       if (rc)
+       if (rc == OPAL_UNSUPPORTED)
+               dev_err(&dev->dev, "Required cxl mode not supported by firmware - update skiboot\n");
+       else if (rc)
                dev_err(&dev->dev, "opal_pci_set_phb_cxl_mode failed: %i\n", rc);
 
        return rc;
@@ -3480,6 +3480,9 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
        if (phb->regs == NULL)
                pr_err("  Failed to map registers !\n");
 
+       /* Initialize TCE kill register */
+       pnv_pci_ioda_setup_opal_tce_kill(phb);
+
        /* Initialize more IODA stuff */
        phb->ioda.total_pe_num = 1;
        prop32 = of_get_property(np, "ibm,opal-num-pes", NULL);
@@ -3489,6 +3492,10 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
        if (prop32)
                phb->ioda.reserved_pe_idx = be32_to_cpup(prop32);
 
+       /* Invalidate RID to PE# mapping */
+       for (segno = 0; segno < ARRAY_SIZE(phb->ioda.pe_rmap); segno++)
+               phb->ioda.pe_rmap[segno] = IODA_INVALID_PE;
+
        /* Parse 64-bit MMIO range */
        pnv_ioda_parse_m64_window(phb);