KVM: PPC: Book3S: Fix guest DMA when guest partially backed by THP pages

[linux-2.6-microblaze.git] / arch / powerpc / mm / hash_utils_64.c

diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 8318716..f23a89d 100644 (file)
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -48,7 +48,6 @@
 #include <linux/uaccess.h>
 #include <asm/machdep.h>
 #include <asm/prom.h>
-#include <asm/tlbflush.h>
 #include <asm/io.h>
 #include <asm/eeh.h>
 #include <asm/tlb.h>
@@ -808,31 +807,6 @@ int hash__remove_section_mapping(unsigned long start, unsigned long end)
 }
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
-static void update_hid_for_hash(void)
-{
-       unsigned long hid0;
-       unsigned long rb = 3UL << PPC_BITLSHIFT(53); /* IS = 3 */
-
-       asm volatile("ptesync": : :"memory");
-       /* prs = 0, ric = 2, rs = 0, r = 1 is = 3 */
-       asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
-                    : : "r"(rb), "i"(0), "i"(0), "i"(2), "r"(0) : "memory");
-       asm volatile("eieio; tlbsync; ptesync; isync; slbia": : :"memory");
-       trace_tlbie(0, 0, rb, 0, 2, 0, 0);
-
-       /*
-        * now switch the HID
-        */
-       hid0  = mfspr(SPRN_HID0);
-       hid0 &= ~HID0_POWER9_RADIX;
-       mtspr(SPRN_HID0, hid0);
-       asm volatile("isync": : :"memory");
-
-       /* Wait for it to happen */
-       while ((mfspr(SPRN_HID0) & HID0_POWER9_RADIX))
-               cpu_relax();
-}
-
 static void __init hash_init_partition_table(phys_addr_t hash_table,
                                             unsigned long htab_size)
 {
@@ -845,8 +819,6 @@ static void __init hash_init_partition_table(phys_addr_t hash_table,
        htab_size =  __ilog2(htab_size) - 18;
        mmu_partition_table_set_entry(0, hash_table | htab_size, 0);
        pr_info("Partition table %p\n", partition_tb);
-       if (cpu_has_feature(CPU_FTR_POWER9_DD1))
-               update_hid_for_hash();
 }
 
 static void __init htab_initialize(void)
@@ -1077,9 +1049,6 @@ void hash__early_init_mmu_secondary(void)
        /* Initialize hash table for that CPU */
        if (!firmware_has_feature(FW_FEATURE_LPAR)) {
 
-               if (cpu_has_feature(CPU_FTR_POWER9_DD1))
-                       update_hid_for_hash();
-
                if (!cpu_has_feature(CPU_FTR_ARCH_300))
                        mtspr(SPRN_SDR1, _SDR1);
                else
@@ -1783,8 +1752,7 @@ long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
        long slot;
 
 repeat:
-       hpte_group = ((hash & htab_hash_mask) *
-                      HPTES_PER_GROUP) & ~0x7UL;
+       hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
 
        /* Insert into the hash table, primary slot */
        slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, vflags,
@@ -1792,15 +1760,14 @@ repeat:
 
        /* Primary is full, try the secondary */
        if (unlikely(slot == -1)) {
-               hpte_group = ((~hash & htab_hash_mask) *
-                             HPTES_PER_GROUP) & ~0x7UL;
+               hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP;
                slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags,
                                                vflags | HPTE_V_SECONDARY,
                                                psize, psize, ssize);
                if (slot == -1) {
                        if (mftb() & 0x1)
-                               hpte_group = ((hash & htab_hash_mask) *
-                                             HPTES_PER_GROUP)&~0x7UL;
+                               hpte_group = (hash & htab_hash_mask) *
+                                               HPTES_PER_GROUP;
 
                        mmu_hash_ops.hpte_remove(hpte_group);
                        goto repeat;