powerepc/book3s64/hash: Align start/end address correctly with bolt mapping

[linux-2.6-microblaze.git] / arch / powerpc / mm / book3s64 / radix_pgtable.c

diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index 28c7849..5c8adeb 100644 (file)
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -276,6 +276,7 @@ static int __meminit create_physical_mapping(unsigned long start,
        int psize;
 
        start = ALIGN(start, PAGE_SIZE);
+       end   = ALIGN_DOWN(end, PAGE_SIZE);
        for (addr = start; addr < end; addr += mapping_size) {
                unsigned long gap, previous_size;
                int rc;
@@ -734,21 +735,6 @@ void radix__mmu_cleanup_all(void)
        }
 }
 
-void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base,
-                               phys_addr_t first_memblock_size)
-{
-       /*
-        * We don't currently support the first MEMBLOCK not mapping 0
-        * physical on those processors
-        */
-       BUG_ON(first_memblock_base != 0);
-
-       /*
-        * Radix mode is not limited by RMA / VRMA addressing.
-        */
-       ppc64_rma_size = ULONG_MAX;
-}
-
 #ifdef CONFIG_MEMORY_HOTPLUG
 static void free_pte_table(pte_t *pte_start, pmd_t *pmd)
 {