Merge tag 'mips_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

[linux-2.6-microblaze.git] / arch / mips / include / asm / mips-cps.h

diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h
index fd43d87..35fb8ee 100644 (file)
--- a/arch/mips/include/asm/mips-cps.h
+++ b/arch/mips/include/asm/mips-cps.h
@@ -10,6 +10,8 @@
 #include <linux/io.h>
 #include <linux/types.h>
 
+#include <asm/mips-boards/launch.h>
+
 extern unsigned long __cps_access_bad_size(void)
        __compiletime_error("Bad size for CPS accessor");
 
@@ -165,11 +167,30 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
  */
 static inline unsigned int mips_cps_numcores(unsigned int cluster)
 {
+       unsigned int ncores;
+
        if (!mips_cm_present())
                return 0;
 
        /* Add one before masking to handle 0xff indicating no cores */
-       return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
+       ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
+
+       if (IS_ENABLED(CONFIG_SOC_MT7621)) {
+               struct cpulaunch *launch;
+
+               /*
+                * Ralink MT7621S SoC is single core, but the GCR_CONFIG method
+                * always reports 2 cores. Check the second core's LAUNCH_FREADY
+                * flag to detect if the second core is missing. This method
+                * only works before the core has been started.
+                */
+               launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
+               launch += 2; /* MT7621 has 2 VPEs per core */
+               if (!(launch->flags & LAUNCH_FREADY))
+                       ncores = 1;
+       }
+
+       return ncores;
 }
 
 /**